[Mesa-dev] [PATCH 1/6] r600g: kill off the fallback for crazy src_offset values
Alex Deucher
alexdeucher at gmail.com
Mon Apr 2 14:35:18 PDT 2012
On Mon, Apr 2, 2012 at 11:10 AM, Marek Olšák <maraeo at gmail.com> wrote:
> st/mesa doesn't allow src_offset to be greater than stride and the maximum
> stride r600 supports is 2047.
For 5/6, IIRC, in the early days of r600g there were some issues with
the ordering of the flushes since the ddx flushes after for dst
caches. Other than that,
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> src/gallium/drivers/r600/r600_asm.c | 24 +++++----------
> src/gallium/drivers/r600/r600_pipe.h | 5 ---
> src/gallium/drivers/r600/r600_state_common.c | 39 ++++++--------------------
> 3 files changed, 17 insertions(+), 51 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
> index 00f1a8b..3298386 100644
> --- a/src/gallium/drivers/r600/r600_asm.c
> +++ b/src/gallium/drivers/r600/r600_asm.c
> @@ -2712,18 +2712,6 @@ int r600_vertex_elements_build_fetch_shader(struct r600_context *rctx, struct r6
> uint32_t *bytecode;
> int i, r;
>
> - /* Vertex element offsets need special handling. If the offset is
> - * bigger than what we can put in the fetch instruction we need to
> - * alter the vertex resource offset. In order to simplify code we
> - * will bind one resource per element in such cases. It's a worst
> - * case scenario. */
> - for (i = 0; i < ve->count; i++) {
> - ve->vbuffer_offset[i] = C_SQ_VTX_WORD2_OFFSET & elements[i].src_offset;
> - if (ve->vbuffer_offset[i]) {
> - ve->vbuffer_need_offset = 1;
> - }
> - }
> -
> memset(&bc, 0, sizeof(bc));
> r600_bytecode_init(&bc, rctx->chip_class, rctx->family);
>
> @@ -2752,9 +2740,9 @@ int r600_vertex_elements_build_fetch_shader(struct r600_context *rctx, struct r6
> }
>
> for (i = 0; i < ve->count; i++) {
> - unsigned vbuffer_index;
> r600_vertex_data_type(ve->elements[i].src_format,
> &format, &num_format, &format_comp, &endian);
> +
> desc = util_format_description(ve->elements[i].src_format);
> if (desc == NULL) {
> r600_bytecode_clear(&bc);
> @@ -2762,10 +2750,14 @@ int r600_vertex_elements_build_fetch_shader(struct r600_context *rctx, struct r6
> return -EINVAL;
> }
>
> - /* see above for vbuffer_need_offset explanation */
> - vbuffer_index = elements[i].vertex_buffer_index;
> + if (elements[i].src_offset > 65535) {
> + r600_bytecode_clear(&bc);
> + R600_ERR("too big src_offset: %u\n", elements[i].src_offset);
> + return -EINVAL;
> + }
> +
> memset(&vtx, 0, sizeof(vtx));
> - vtx.buffer_id = (ve->vbuffer_need_offset ? i : vbuffer_index) + fetch_resource_start;
> + vtx.buffer_id = elements[i].vertex_buffer_index + fetch_resource_start;
> vtx.fetch_type = elements[i].instance_divisor ? 1 : 0;
> vtx.src_gpr = elements[i].instance_divisor > 1 ? i + 1 : 0;
> vtx.src_sel_x = elements[i].instance_divisor ? 3 : 0;
> diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
> index ccbfaa7..96df79b 100644
> --- a/src/gallium/drivers/r600/r600_pipe.h
> +++ b/src/gallium/drivers/r600/r600_pipe.h
> @@ -169,11 +169,6 @@ struct r600_vertex_element
> struct r600_resource *fetch_shader;
> unsigned fs_size;
> struct r600_pipe_state rstate;
> - /* if offset is to big for fetch instructio we need to alterate
> - * offset of vertex buffer, record here the offset need to add
> - */
> - unsigned vbuffer_need_offset;
> - unsigned vbuffer_offset[PIPE_MAX_ATTRIBS];
> };
>
> struct r600_pipe_shader {
> diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
> index f3b63cf..42b185c 100644
> --- a/src/gallium/drivers/r600/r600_state_common.c
> +++ b/src/gallium/drivers/r600/r600_state_common.c
> @@ -682,40 +682,19 @@ void r600_set_so_targets(struct pipe_context *ctx,
>
> static void r600_vertex_buffer_update(struct r600_context *rctx)
> {
> - struct r600_pipe_resource_state *rstate;
> - struct r600_resource *rbuffer;
> - struct pipe_vertex_buffer *vertex_buffer;
> - unsigned i, count, offset;
> + unsigned i, count;
>
> r600_inval_vertex_cache(rctx);
>
> - if (rctx->vertex_elements->vbuffer_need_offset) {
> - /* one resource per vertex elements */
> - count = rctx->vertex_elements->count;
> - } else {
> - /* bind vertex buffer once */
> - count = rctx->vbuf_mgr->nr_real_vertex_buffers;
> - }
> + count = rctx->vbuf_mgr->nr_real_vertex_buffers;
>
> for (i = 0 ; i < count; i++) {
> - rstate = &rctx->fs_resource[i];
> -
> - if (rctx->vertex_elements->vbuffer_need_offset) {
> - /* one resource per vertex elements */
> - unsigned vbuffer_index;
> - vbuffer_index = rctx->vertex_elements->elements[i].vertex_buffer_index;
> - vertex_buffer = &rctx->vbuf_mgr->real_vertex_buffer[vbuffer_index];
> - rbuffer = (struct r600_resource*)vertex_buffer->buffer;
> - offset = rctx->vertex_elements->vbuffer_offset[i];
> - } else {
> - /* bind vertex buffer once */
> - vertex_buffer = &rctx->vbuf_mgr->real_vertex_buffer[i];
> - rbuffer = (struct r600_resource*)vertex_buffer->buffer;
> - offset = 0;
> - }
> - if (vertex_buffer == NULL || rbuffer == NULL)
> + struct r600_pipe_resource_state *rstate = &rctx->fs_resource[i];
> + struct pipe_vertex_buffer *vb = &rctx->vbuf_mgr->real_vertex_buffer[i];
> +
> + if (!vb->buffer) {
> continue;
> - offset += vertex_buffer->buffer_offset;
> + }
>
> if (!rstate->id) {
> if (rctx->chip_class >= EVERGREEN) {
> @@ -726,9 +705,9 @@ static void r600_vertex_buffer_update(struct r600_context *rctx)
> }
>
> if (rctx->chip_class >= EVERGREEN) {
> - evergreen_pipe_mod_buffer_resource(&rctx->context, rstate, rbuffer, offset, vertex_buffer->stride, RADEON_USAGE_READ);
> + evergreen_pipe_mod_buffer_resource(&rctx->context, rstate, (struct r600_resource*)vb->buffer, vb->buffer_offset, vb->stride, RADEON_USAGE_READ);
> } else {
> - r600_pipe_mod_buffer_resource(rstate, rbuffer, offset, vertex_buffer->stride, RADEON_USAGE_READ);
> + r600_pipe_mod_buffer_resource(rstate, (struct r600_resource*)vb->buffer, vb->buffer_offset, vb->stride, RADEON_USAGE_READ);
> }
> r600_context_pipe_state_set_fs_resource(rctx, rstate, i);
> }
> --
> 1.7.5.4
>
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