[Mesa-dev] [PATCH 5/7] intel: image: add support for interlaced structure.
Gwenole Beauchesne
gb.devel at gmail.com
Tue Apr 24 08:30:37 PDT 2012
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 ++++++++++++++++++++-
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 15 ++++++++++++-
src/mesa/drivers/dri/intel/intel_regions.c | 5 ++++
src/mesa/drivers/dri/intel/intel_regions.h | 4 +++
src/mesa/drivers/dri/intel/intel_screen.c | 3 ++
6 files changed, 48 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 01bad5c..0e927ef 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -259,6 +259,8 @@
#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0
#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1
#define BRW_SURFACE_CUBEFACE_ENABLES 0x3f
+#define BRW_SURFACE_VERT_LINE_STRIDE_SHIFT 12
+#define BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT 11
#define BRW_SURFACE_BLEND_ENABLED (1 << 13)
#define BRW_SURFACE_WRITEDISABLE_B_SHIFT 14
#define BRW_SURFACE_WRITEDISABLE_G_SHIFT 15
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 69af0ee..0a6de2b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -642,15 +642,35 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
uint32_t *surf;
- int width, height, depth;
+ int width, height, depth, vert_line_stride_ofs, vert_line_stride;
intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
+ /* Interlaced surface
+ * XXX: texture addrss control mode must be set to TEXCOORDMODE_CLAMP
+ * XXX: mip mode filter must be set to MIPFILTER_NONE
+ */
+ switch (mt->region->structure) {
+ case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+ vert_line_stride_ofs = 1;
+ /* fall-through */
+ case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+ vert_line_stride = 1;
+ height /= 2;
+ break;
+ default:
+ vert_line_stride = 0;
+ vert_line_stride_ofs = 0;
+ break;
+ }
+
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, &brw->wm.surf_offset[surf_index]);
surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
+ vert_line_stride << BRW_SURFACE_VERT_LINE_STRIDE_SHIFT |
+ vert_line_stride_ofs << BRW_SURFACE_VERT_LINE_STRIDE_OFS_SHIFT |
BRW_SURFACE_CUBEFACE_ENABLES |
(translate_tex_format(mt->format,
firstImage->InternalFormat,
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index cbccd2b..c567fb0 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -157,9 +157,20 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
gen7_set_surface_tiling(surf, intelObj->mt->region->tiling);
+ /* Interlaced surface
+ * XXX: mip mode filter must be set to MIPFILTER_NONE
+ */
+ switch (mt->region->structure) {
+ case __DRI_IMAGE_STRUCTURE_BOTTOM_FIELD:
+ surf->ss0.vert_line_stride_ofs = 1;
+ /* fall-through */
+ case __DRI_IMAGE_STRUCTURE_TOP_FIELD:
+ surf->ss0.vert_line_stride = 1;
+ height /= 2;
+ break;
+ }
+
/* ss0 remaining fields:
- * - vert_line_stride (exists on gen6 but we ignore it)
- * - vert_line_stride_ofs (exists on gen6 but we ignore it)
* - surface_array_spacing
* - render_cache_read_write (exists on gen6 but ignored here)
*/
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 70619af..218be30 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -258,6 +258,7 @@ intel_region_alloc_internal(struct intel_screen *screen,
return region;
region->plane_id = 0;
+ region->structure = attrs->structure;
region->cpp = attrs->cpp;
region->width = attrs->width;
region->height = attrs->height;
@@ -292,6 +293,7 @@ intel_region_alloc(struct intel_screen *screen,
if (buffer == NULL)
return NULL;
+ attrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
attrs.cpp = cpp;
attrs.width = width;
attrs.height = height;
@@ -324,6 +326,9 @@ static inline bool
intel_region_validate_attributes(const struct intel_region *region,
const struct intel_region_attributes *attrs)
{
+ /* Don't check for picture structure since interlaced contents are
+ * handled at rendering time, so regions remain compatible
+ */
return (region->cpp == attrs->cpp &&
region->width == attrs->width &&
region->height == attrs->height &&
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h
index acfecd6..052ee0b 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -40,6 +40,7 @@
#include "main/mtypes.h"
#include "intel_bufmgr.h"
+#include "dri_util.h"
struct intel_context;
struct intel_buffer_object;
@@ -61,6 +62,7 @@ struct intel_region
GLuint width; /**< in pixels */
GLuint height; /**< in pixels */
GLuint pitch; /**< in pixels */
+ GLuint structure; /**< Picture structure. See __DRI_IMAGE_STRUCTURE_xxx */
GLubyte *map; /**< only non-NULL when region is actually mapped */
GLuint map_refcount; /**< Reference count for mapping */
@@ -75,6 +77,7 @@ struct intel_region
* See. intel_region_alloc_for_handle().
*/
struct intel_region_attributes {
+ GLuint structure; /**< picture structure. See __DRI_IMAGE_STRUCTURE_xxx */
GLuint cpp; /**< bytes per pixel */
GLuint width; /**< in pixels */
GLuint height; /**< in pixels */
@@ -105,6 +108,7 @@ intel_region_alloc_for_handle(struct intel_screen *screen,
{
struct intel_region_attributes attrs;
+ attrs.structure = __DRI_IMAGE_STRUCTURE_FRAME;
attrs.cpp = cpp;
attrs.width = width;
attrs.height = height;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 2453d49..84e4e41 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -239,6 +239,7 @@ intel_create_image_from_name2(__DRIscreen *screen,
image->data = loaderPrivate;
cpp = _mesa_get_format_bytes(image->format);
+ region_attrs.structure = attrs->structure;
region_attrs.cpp = cpp;
region_attrs.width = attrs->width;
region_attrs.height = attrs->height;
@@ -384,6 +385,8 @@ intel_query_image(__DRIimage *image, int attrib, int *value)
return intel_region_flink(image->region, (uint32_t *) value);
case __DRI_IMAGE_ATTRIB_FORMAT:
return image->dri_format;
+ case __DRI_IMAGE_ATTRIB_STRUCTURE:
+ return image->region->structure;
default:
return false;
}
--
1.7.5.4
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