[Mesa-dev] [PATCH 2/2] i965/fs: Fix FB writes that tried to use the non-existent m16 register.

[Kenneth Graunke]

On 04/24/2012 10:12 AM, Eric Anholt wrote:
> On Tue, 24 Apr 2012 00:34:00 -0700, Kenneth Graunke<kenneth at whitecape.org>  wrote:
>> A little analysis shows that the worst-case value for "nr" is 16:
>> - base_mrf = 2                   ... 2
>> - header present (say gen == 5)  ... 4
>> - SIMD16 mode: += 4 * reg_width  ... 12
>> - source_depth_to_render_target  ... 14
>> - dest_depth_reg                 ... 16
>>
>> This resulted in us setting base_mrf to 2 and mlen to 14.  In other
>> words, we'd try to use m2..m16.  But m16 doesn't exist pre-Gen6.  Also,
>
> nr is "where you'd put the next arg if there was one", right?  so nr of
> 16 should be fine, since you've only loaded up to m15?

Drat.  You're right...

m2  m3  m4  m5  m6  m7  m8  m9  m10 m11 m12 m13 m14 m15
header  rrrrrr  gggggg  bbbbbb  aaaaaaa o-Depth dstDepth

That does fit.  My assertions in the previous patch are off by one.

Back to the drawing board...