[Mesa-dev] [PATCH 5/6] radeonsi: fix TEX writemask

Michel Dänzer michel at daenzer.net
Thu Aug 2 02:21:23 PDT 2012


On Don, 2012-08-02 at 11:05 +0200, Christian König wrote: 
> On 02.08.2012 07:51, Michel Dänzer wrote:
> > On Mit, 2012-08-01 at 23:28 +0200, Christian König wrote:
> >> Using the writemask in the sampler results in packet
> >> VGPRS.
> > What does that mean?
> 
> The instructions with a destination mask are packing their results, e.g. 
> when you sample RGBA you get:
> R in VGPR0
> G in VGPR1
> B in VGPR2
> A in VGPR3
> 
> But when you for example mask G&B you get:
> R in VGPR0
> G masked
> B masked
> A in VGPR1
> 
> So your image sample instruction is only writing 2 VGPRS then.

Ah, so that should be spelled 'packed' then.


> > [SNIP]
> > Couldn't this incorrectly clobber components of the destination which
> > were supposed to be masked?
> 
> No cause it is just an optimization of not fetching unwanted components, 
> and not masking anything.

Hmm, but can't it happen that LLVM assigns destination GPRs containing
previous values that need to be preserved according to the TGSI
writemask?


-- 
Earthling Michel Dänzer           |                   http://www.amd.com
Libre software enthusiast         |          Debian, X and DRI developer


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