[Mesa-dev] [PATCH] i965/gen7: Add support for GL_ARB_timer_query.

Eric Anholt eric at anholt.net
Sun Aug 12 20:16:33 PDT 2012


Needs updated libdrm.
---

My home hardware collection is a mess right now, and testing
ARB_timer_query requires examining rollover behavior, so this is
gen7-only for the moment.  I do eventually want to enable it all the
way back to g45 (the earliest usable timer register).

 configure.ac                                  |    2 +-
 src/mesa/drivers/dri/i965/brw_queryobj.c      |   44 +++++++++++++++++++++++++
 src/mesa/drivers/dri/intel/intel_extensions.c |    8 +++++
 src/mesa/drivers/dri/intel/intel_reg.h        |    2 ++
 4 files changed, 55 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 2ecedaf..3e1ec8c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -29,7 +29,7 @@ LT_INIT([disable-static])
 dnl Versions for external dependencies
 LIBDRM_REQUIRED=2.4.24
 LIBDRM_RADEON_REQUIRED=2.4.31
-LIBDRM_INTEL_REQUIRED=2.4.37
+LIBDRM_INTEL_REQUIRED=2.4.38
 LIBDRM_NVVIEUX_REQUIRED=2.4.33
 LIBDRM_NOUVEAU_REQUIRED=2.4.33
 DRI2PROTO_REQUIRED=2.6
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index 3f9e065..b725fed 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -41,6 +41,7 @@
 #include "main/imports.h"
 
 #include "brw_context.h"
+#include "brw_defines.h"
 #include "brw_state.h"
 #include "intel_batchbuffer.h"
 #include "intel_reg.h"
@@ -155,6 +156,21 @@ brw_queryobj_get_results(struct gl_context *ctx,
 	 query->Base.Result += 1000 * ((results[1] >> 32) - (results[0] >> 32));
       break;
 
+   case GL_TIMESTAMP:
+      if (intel->gen >= 6) {
+         /* The timestamp register we can read for glGetTimestamp() masks out
+          * the top 32 bits, so we do that here too to let the two counters be
+          * compared against each other.
+          *
+          * The low 32 bits rolls over in ~343 seconds.
+          */
+	 query->Base.Result = 80 * (results[1] & 0xffffffff);
+      } else {
+	 query->Base.Result = 1000 * (results[1] >> 32);
+      }
+
+      break;
+
    case GL_SAMPLES_PASSED_ARB:
       /* Map and count the pixels from the current query BO */
       for (i = query->first_index; i <= query->last_index; i++) {
@@ -262,6 +278,12 @@ brw_end_query(struct gl_context *ctx, struct gl_query_object *q)
    struct brw_query_object *query = (struct brw_query_object *)q;
 
    switch (query->Base.Target) {
+   case GL_TIMESTAMP:
+      drm_intel_bo_unreference(query->bo);
+      query->bo = drm_intel_bo_alloc(intel->bufmgr, "timer query",
+				     4096, 4096);
+      /* FALLTHROUGH */
+
    case GL_TIME_ELAPSED_EXT:
       write_timestamp(intel, query->bo, 1);
       intel_batchbuffer_flush(intel);
@@ -404,6 +426,27 @@ brw_emit_query_end(struct brw_context *brw)
    brw->query.index++;
 }
 
+static uint64_t
+brw_get_timestamp(struct gl_context *ctx)
+{
+   struct intel_context *intel = intel_context(ctx);
+   uint64_t result = 0;
+
+   drm_intel_reg_read(intel->bufmgr, TIMESTAMP, &result);
+
+   /* On IVB, the register reads as 80-ns values in the top 32 bits and
+    * 0x00000001 or occasionally other junk in the low 32 bits.
+    */
+   result = result >> 32;
+
+   if (intel->gen >= 6)
+      return 80 * result;
+   else
+      return 1000 * result;
+
+   return result;
+}
+
 void brw_init_queryobj_functions(struct dd_function_table *functions)
 {
    functions->NewQueryObject = brw_new_query_object;
@@ -412,4 +455,5 @@ void brw_init_queryobj_functions(struct dd_function_table *functions)
    functions->EndQuery = brw_end_query;
    functions->CheckQuery = brw_check_query;
    functions->WaitQuery = brw_wait_query;
+   functions->GetTimestamp = brw_get_timestamp;
 }
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 76b56a2..f5e1be1 100755
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -31,6 +31,7 @@
 #include "intel_chipset.h"
 #include "intel_context.h"
 #include "intel_extensions.h"
+#include "intel_reg.h"
 #include "utils.h"
 
 /**
@@ -111,6 +112,13 @@ intelInitExtensions(struct gl_context *ctx)
    if (intel->gen >= 5)
       ctx->Extensions.EXT_timer_query = true;
 
+   if (intel->gen >= 7) {
+      uint64_t dummy;
+      /* Test if the kernel has the ioctl. */
+      if (drm_intel_reg_read(intel->bufmgr, TIMESTAMP, &dummy) == 0)
+         ctx->Extensions.ARB_timer_query = true;
+   }
+
    if (intel->gen >= 4) {
       ctx->Extensions.ARB_color_buffer_float = true;
       ctx->Extensions.ARB_depth_buffer_float = true;
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
index 2c75a8e..53b1cb9 100644
--- a/src/mesa/drivers/dri/intel/intel_reg.h
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -275,3 +275,5 @@
 #define SO_NUM_PRIMS_WRITTEN1_IVB	0x5208
 #define SO_NUM_PRIMS_WRITTEN2_IVB	0x5210
 #define SO_NUM_PRIMS_WRITTEN3_IVB	0x5218
+
+#define TIMESTAMP                       0x2358
-- 
1.7.10.4



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