[Mesa-dev] [PATCH] i965/fs: Disable write masking when setting up texturing m0.

[Paul Berry]

On 30 August 2012 11:07, Eric Anholt <eric at anholt.net> wrote:

> I don't know of any hangs/rendering failures that this fixes, but it sure
> looks necessary.
>

Good catch!  This definitely seems like the kind of thing that could lead
to rare/unpredictable problems.

It looks like there is similar code in brw_vec4_emit.cpp that needs fixing
(vec4_visitor::generate_tex()).

With the vec4 code also fixed, this patch is:

Reviewed-by: Paul Berry <stereotype441 at gmail.com>


> ---
>  src/mesa/drivers/dri/i965/brw_fs_emit.cpp |    1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
> index 5900c0e..cc038dd 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
> @@ -389,6 +389,7 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg
> dst, struct brw_reg src)
>      */
>     if (inst->texture_offset) {
>        brw_push_insn_state(p);
> +      brw_set_mask_control(p, BRW_MASK_DISABLE);
>        brw_set_compression_control(p, BRW_COMPRESSION_NONE);
>        /* Explicitly set up the message header by copying g0 to the MRF. */
>        brw_MOV(p, retype(brw_message_reg(inst->base_mrf),
> BRW_REGISTER_TYPE_UD),
> --
> 1.7.10.4
>
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