[Mesa-dev] [PATCH] r600g[WIP]: tgsi to llvm emits pointer to globaladdr load for constant buffer data
Tom Stellard
tom at stellard.net
Thu Dec 20 11:01:16 PST 2012
On Thu, Dec 20, 2012 at 07:37:27PM +0100, Vincent Lejeune wrote:
> ---
> src/gallium/drivers/r600/r600_llvm.c | 23 +++++++++++++----------
> 1 file changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
> index 22f5f11..2b885c9 100644
> --- a/src/gallium/drivers/r600/r600_llvm.c
> +++ b/src/gallium/drivers/r600/r600_llvm.c
> @@ -18,7 +18,7 @@
>
> #include <stdio.h>
>
> -#if defined R600_USE_LLVM || defined HAVE_OPENCL
> +//#if defined R600_USE_LLVM || defined HAVE_OPENCL
Unnecessary change.
>
> static LLVMValueRef llvm_fetch_const(
> struct lp_build_tgsi_context * bld_base,
> @@ -26,14 +26,14 @@ static LLVMValueRef llvm_fetch_const(
> enum tgsi_opcode_type type,
> unsigned swizzle)
> {
> - LLVMValueRef args[2];
> - args[0] = lp_build_const_int32(bld_base->base.gallivm,
> - radeon_llvm_reg_index_soa(reg->Register.Index, swizzle));
> - args[1] = lp_build_const_int32(bld_base->base.gallivm, 0);
> - LLVMValueRef cval = build_intrinsic(bld_base->base.gallivm->builder,
> - "llvm.AMDGPU.load.const", bld_base->base.elem_type,
> - args, 2, LLVMReadNoneAttribute);
> -
> + LLVMValueRef offset[2] = {
> + LLVMConstInt(LLVMInt64TypeInContext(bld_base->base.gallivm->context), 0, false),
> + lp_build_const_int32(bld_base->base.gallivm, reg->Register.Index)
> + };
> + LLVMValueRef const_ptr = LLVMGetFirstGlobal(bld_base->base.gallivm->module);
> + LLVMValueRef ptr = LLVMBuildGEP(bld_base->base.gallivm->builder, const_ptr, offset, 2, "");
We can just pass the offset to LLVMBuildIntoToPtr() instead of using a global
variable + GEP. The offset acts like a pointer in this case. As an example,
look at use_sgpr in radeonsi_shader.c
-Tom
> + LLVMValueRef cvecval = LLVMBuildLoad(bld_base->base.gallivm->builder, ptr, "");
> + LLVMValueRef cval = LLVMBuildExtractElement(bld_base->base.gallivm->builder, cvecval, lp_build_const_int32(bld_base->base.gallivm, swizzle), "");
> return bitcast(bld_base, type, cval);
> }
>
> @@ -538,6 +538,9 @@ LLVMModuleRef r600_tgsi_llvm(
> bld_base->op_actions[TGSI_OPCODE_TXP].emit = llvm_emit_tex;
> bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cndlt;
>
> + LLVMTypeRef type = LLVMArrayType(LLVMVectorType(bld_base->base.elem_type, 4), 1024);
> + LLVMAddGlobalInAddressSpace(bld_base->base.gallivm->module, type, "const", 2);
> +
> lp_build_tgsi_llvm(bld_base, tokens);
>
> radeon_llvm_finalize_module(ctx);
> @@ -620,4 +623,4 @@ unsigned r600_llvm_compile(
> gpu_family, dump);
> }
>
> -#endif
> +//#endif
Unnecessary change.
> --
> 1.8.0.2
>
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