[Mesa-dev] [PATCH] r600g: rework handling of the constants
Vincent Lejeune
vljn at ovi.com
Sun Dec 23 14:58:52 PST 2012
>From Vadim Girlin patch
---
src/gallium/drivers/r600/r600_llvm.c | 19 ++++++++++--------
src/gallium/drivers/r600/r600_shader.c | 35 +++++++++++++++++++++++++---------
2 files changed, 37 insertions(+), 17 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index 22f5f11..f5a51ae 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -26,14 +26,14 @@ static LLVMValueRef llvm_fetch_const(
enum tgsi_opcode_type type,
unsigned swizzle)
{
- LLVMValueRef args[2];
- args[0] = lp_build_const_int32(bld_base->base.gallivm,
- radeon_llvm_reg_index_soa(reg->Register.Index, swizzle));
- args[1] = lp_build_const_int32(bld_base->base.gallivm, 0);
- LLVMValueRef cval = build_intrinsic(bld_base->base.gallivm->builder,
- "llvm.AMDGPU.load.const", bld_base->base.elem_type,
- args, 2, LLVMReadNoneAttribute);
-
+ LLVMValueRef offset[2] = {
+ LLVMConstInt(LLVMInt64TypeInContext(bld_base->base.gallivm->context), 0, false),
+ lp_build_const_int32(bld_base->base.gallivm, reg->Register.Index)
+ };
+ LLVMValueRef const_ptr = LLVMGetFirstGlobal(bld_base->base.gallivm->module);
+ LLVMValueRef ptr = LLVMBuildGEP(bld_base->base.gallivm->builder, const_ptr, offset, 2, "");
+ LLVMValueRef cvecval = LLVMBuildLoad(bld_base->base.gallivm->builder, ptr, "");
+ LLVMValueRef cval = LLVMBuildExtractElement(bld_base->base.gallivm->builder, cvecval, lp_build_const_int32(bld_base->base.gallivm, swizzle), "");
return bitcast(bld_base, type, cval);
}
@@ -538,6 +538,9 @@ LLVMModuleRef r600_tgsi_llvm(
bld_base->op_actions[TGSI_OPCODE_TXP].emit = llvm_emit_tex;
bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cndlt;
+ LLVMTypeRef type = LLVMArrayType(LLVMVectorType(bld_base->base.elem_type, 4), 1024);
+ LLVMAddGlobalInAddressSpace(bld_base->base.gallivm->module, type, "const", 2);
+
lp_build_tgsi_llvm(bld_base, tokens);
radeon_llvm_finalize_module(ctx);
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index f6873c3..1152c6f 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -299,15 +299,21 @@ static unsigned r600_src_from_byte_stream(unsigned char * bytes,
static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx,
unsigned char * bytes, unsigned bytes_read)
{
- unsigned src_idx;
+ unsigned src_idx, src_num;
struct r600_bytecode_alu alu;
- unsigned src_const_reg[3];
+ unsigned src_use_sel[3];
+ unsigned src_sel[3] = {};
uint32_t word0, word1;
-
+
+ src_num = bytes[bytes_read++];
+
memset(&alu, 0, sizeof(alu));
- for(src_idx = 0; src_idx < 3; src_idx++) {
+ for(src_idx = 0; src_idx < src_num; src_idx++) {
unsigned i;
- src_const_reg[src_idx] = bytes[bytes_read++];
+ src_use_sel[src_idx] = bytes[bytes_read++];
+ for (i = 0; i < 4; i++) {
+ src_sel[src_idx] |= bytes[bytes_read++] << (i * 8);
+ }
for (i = 0; i < 4; i++) {
alu.src[src_idx].value |= bytes[bytes_read++] << (i * 8);
}
@@ -327,10 +333,21 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx,
break;
}
- for(src_idx = 0; src_idx < 3; src_idx++) {
- if (src_const_reg[src_idx]) {
- alu.src[src_idx].kc_bank = src_const_reg[src_idx] - 1;
- alu.src[src_idx].sel += 512;
+ for(src_idx = 0; src_idx < src_num; src_idx++) {
+ if (src_use_sel[src_idx]) {
+ unsigned sel = src_sel[src_idx];
+
+ alu.src[src_idx].chan = sel & 3;
+ sel >>= 2;
+
+ if (sel>=512) { /* constant */
+ sel -= 512;
+ alu.src[src_idx].kc_bank = sel >> 12;
+ alu.src[src_idx].sel = (sel & 4095) + 512;
+ }
+ else {
+ alu.src[src_idx].sel = sel;
+ }
}
}
--
1.8.0.2
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