[Mesa-dev] r600g glsl 1.40 streamout with no position test

[Dave Airlie]

So I've got a persistent hang with the glsl-1.40-tf-no-position when I
enabled ubo/tbo and glsl 1.40.

My original thoughts were there was no param export from the vertex
shader, but I was wrong on that count, the
vertex shader exports a param along with the stream output.

Below is the TGSI/r600g dump from my evergreen for the offending
program, it reliably takes out all the EG cards I tested on (haven't
tried anything else).

This is blocking me from enabling UBO/TBO on evergreen as I don't want
to start having piglit lockups once I enable it.

Dave.
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VERT
DCL IN[0]
DCL OUT[0], GENERIC[12]
DCL TEMP[0], LOCAL
  0: MOV TEMP[0].x, IN[0].xxxx
  1: MOV OUT[0], TEMP[0]
  2: END
STREAMOUT
  0: MEM_STREAM0_BUF0 OUT[0].x___
bytecode 18 dw -- 4 gprs ---------------------
     E
0000 00000000 CF ADDR:0
0001 84C00000 CF INST:0x13 COND:0 POP_COUNT:0
0002 00000004 ALU ADDR:8 KCACHE_MODE0:0 KCACHE_BANK0:0 KCACHE_BANK1:0
0003 A0100000 ALU INST:0x8 KCACHE_MODE1:0 KCACHE_ADDR0:0 KCACHE_ADDR1:0 COUNT:5
0008 80000001   SRC0(SEL:1 REL:0 CHAN:0 NEG:0) SRC1(SEL:0 REL:0 CHAN:0
NEG:0 IM:0) PRED_SEL:0 LAST:1)
0009 00600C90 * INST:0x19 DST(SEL:3 CHAN:0 REL:0 CLAMP:0)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0010 000000FE   SRC0(SEL:254 REL:0 CHAN:0 NEG:0) SRC1(SEL:0 REL:0
CHAN:0 NEG:0 IM:0) PRED_SEL:0 LAST:0)
0011 00400C90   INST:0x19 DST(SEL:2 CHAN:0 REL:0 CLAMP:0)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0012 00000403   SRC0(SEL:3 REL:0 CHAN:1 NEG:0) SRC1(SEL:0 REL:0 CHAN:0
NEG:0 IM:0) PRED_SEL:0 LAST:0)
0013 20400C90   INST:0x19 DST(SEL:2 CHAN:1 REL:0 CLAMP:0)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0014 00000803   SRC0(SEL:3 REL:0 CHAN:2 NEG:0) SRC1(SEL:0 REL:0 CHAN:0
NEG:0 IM:0) PRED_SEL:0 LAST:0)
0015 40400C90   INST:0x19 DST(SEL:2 CHAN:2 REL:0 CLAMP:0)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0016 80000C03   SRC0(SEL:3 REL:0 CHAN:3 NEG:0) SRC1(SEL:0 REL:0 CHAN:0
NEG:0 IM:0) PRED_SEL:0 LAST:1)
0017 60400C90 * INST:0x19 DST(SEL:2 CHAN:3 REL:0 CLAMP:0)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0004 00010000 EXPORT MEM_STREAM0_BUF0 GPR:2 ELEM_SIZE:0 ARRAY_BASE:0 TYPE:0
0005 90001FFF EXPORT MEM_STREAM0_BUF0 ARRAY_SIZE:4095 COMP_MASK:1
BARRIER:1 INST:268435456 BURST_COUNT:1 EOP:0
0006 C0014000 EXPORT GPR:2 ELEM_SIZE:3 ARRAY_BASE:0 TYPE:2
0007 95200688 EXPORT SWIZ_X:0 SWIZ_Y:1 SWIZ_Z:2 SWIZ_W:3 BARRIER:1
INST:0x54 BURST_COUNT:1 EOP:1
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bytecode 8 dw -- 2 gprs ---------------------
     E
0000 00000002 TEX/VTX ADDR:4
0001 80800000 TEX/VTX INST:0x2 COUNT:1
0004 7C000000   INST:0 FETCH_TYPE:0 BUFFER_ID:0
0005 93564001   SRC(GPR:0 SEL_X:0) MEGA_FETCH_COUNT:31 DST(GPR:1
SEL_X:0 SEL_Y:4 SEL_Z:4 SEL_W:5) USE_CONST_FIELDS:0 FORMAT(DATA:13
NUM:1 COMP:0 MODE:1)
0006 00080000   ENDIAN:0 OFFSET:0
0007 00000000
0002 00000000 CF ADDR:0
0003 85000000 CF INST:0x14 COND:0 POP_COUNT:0
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FRAG
PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
DCL OUT[0], COLOR
DCL CONST[0..3]
  0: MOV_SAT OUT[0], CONST[3]
  1: END
bytecode 12 dw -- 2 gprs ---------------------
     E
0000 40000002 ALU ADDR:4 KCACHE_MODE0:1 KCACHE_BANK0:0 KCACHE_BANK1:0
0001 A00C0000 ALU INST:0x8 KCACHE_MODE1:0 KCACHE_ADDR0:0 KCACHE_ADDR1:0 COUNT:4
0004 00000083   SRC0(SEL:131 REL:0 CHAN:0 NEG:0) SRC1(SEL:0 REL:0
CHAN:0 NEG:0 IM:0) PRED_SEL:0 LAST:0)
0005 80200C90   INST:0x19 DST(SEL:1 CHAN:0 REL:0 CLAMP:1)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0006 00000483   SRC0(SEL:131 REL:0 CHAN:1 NEG:0) SRC1(SEL:0 REL:0
CHAN:0 NEG:0 IM:0) PRED_SEL:0 LAST:0)
0007 A0200C90   INST:0x19 DST(SEL:1 CHAN:1 REL:0 CLAMP:1)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0008 00000883   SRC0(SEL:131 REL:0 CHAN:2 NEG:0) SRC1(SEL:0 REL:0
CHAN:0 NEG:0 IM:0) PRED_SEL:0 LAST:0)
0009 C0200C90   INST:0x19 DST(SEL:1 CHAN:2 REL:0 CLAMP:1)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0010 80000C83   SRC0(SEL:131 REL:0 CHAN:3 NEG:0) SRC1(SEL:0 REL:0
CHAN:0 NEG:0 IM:0) PRED_SEL:0 LAST:1)
0011 E0200C90 * INST:0x19 DST(SEL:1 CHAN:3 REL:0 CLAMP:1)
BANK_SWIZZLE:0 SRC0_ABS:0 SRC1_ABS:0 WRITE_MASK:1 OMOD:0
EXECUTE_MASK:0 UPDATE_PRED:0
0002 C0008000 EXPORT GPR:1 ELEM_SIZE:3 ARRAY_BASE:0 TYPE:0
0003 95200688 EXPORT SWIZ_X:0 SWIZ_Y:1 SWIZ_Z:2 SWIZ_W:3 BARRIER:1
INST:0x54 BURST_COUNT:1 EOP:1
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