[Mesa-dev] [PATCH] i965/gen6: In HiZ op, emit valid pointers in 3DSTATE_CC_STATE_POINTERS

Chad Versace chad.versace at linux.intel.com
Fri Feb 10 10:54:56 PST 2012


Before this patch, the HiZ op was setting the pointers to COLOR_CALC_STATE
and to BLEND_STATE to 0. This was probably safe, since the HiZ op doesn't
use the cc or the blending. And it caused no problems with Piglit and
Citybench.

But, we don't know exactly what the GPU does with those pointers. So, to
be really safe, this patches replaces the 0's with valid pointers.

There is no need to do the analogous change for gen7 because a separate
packet is emitted for each of DEPTH_STENCIL_STATE, COLOR_CALC_STATE, and
BLEND_STATE. In gen7_hiz_exec, we emit only
3DSTATE_DEPTH_STENCIL_STATE_POINTERS.

Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
---
 src/mesa/drivers/dri/i965/gen6_hiz.c |   24 +++++++++++++++++++++---
 1 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_hiz.c b/src/mesa/drivers/dri/i965/gen6_hiz.c
index a86c147..5c1844e 100644
--- a/src/mesa/drivers/dri/i965/gen6_hiz.c
+++ b/src/mesa/drivers/dri/i965/gen6_hiz.c
@@ -327,14 +327,32 @@ gen6_hiz_exec(struct intel_context *intel,
     * The HiZ op doesn't use BLEND_STATE or COLOR_CALC_STATE.
     */
    {
+      uint32_t blend_offset;
       uint32_t depthstencil_offset;
+      uint32_t cc_offset;
+
+      struct gen6_blend_state *blend_state;
+      struct gen6_color_calc_state *cc_state;
+
+      /* Disable everything: color blending, alpha blending, and dithering. */
+      blend_state = brw_state_batch(brw, AUB_TRACE_BLEND_STATE,
+                                    sizeof(*blend_state), 64,
+                                    &blend_offset);
+      memset(blend_state, 0, sizeof(*blend_state));
+
+      /* The HiZ op doesn't use the CC, so just zero-fill the state. */
+      cc_state = brw_state_batch(brw, AUB_TRACE_CC_STATE,
+                                 sizeof(*cc_state), 64,
+                                 &cc_offset);
+      memset(cc_state, 0, sizeof(*cc_state));
+
       gen6_hiz_emit_depth_stencil_state(brw, op, &depthstencil_offset);
 
       BEGIN_BATCH(4);
       OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (4 - 2));
-      OUT_BATCH(1); /* BLEND_STATE offset */
-      OUT_BATCH(depthstencil_offset | 1); /* DEPTH_STENCIL_STATE offset */
-      OUT_BATCH(1); /* COLOR_CALC_STATE offset */
+      OUT_BATCH(blend_offset | 1);
+      OUT_BATCH(depthstencil_offset | 1);
+      OUT_BATCH(cc_offset | 1);
       ADVANCE_BATCH();
    }
 
-- 
1.7.7.6



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