[Mesa-dev] [PATCH 2/2] i965/fs: Enable register spilling on gen7 too.

[Kenneth Graunke]

On 02/09/2012 09:42 PM, Eric Anholt wrote:
> It turns out the same messages work on gen7, we were just being paranoid.
>
> Fixes the penumbra shadows mode of Lightsmark since the register
> allocation fix.
> ---
>   src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp |    2 --
>   1 files changed, 0 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> index 0d1712e..7da1418 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> @@ -236,8 +236,6 @@ fs_visitor::assign_regs()
>
>         if (reg == -1) {
>   	 fail("no register to spill\n");
> -      } else if (intel->gen>= 7) {
> -	 fail("no spilling support on gen7 yet\n");
>         } else if (c->dispatch_width == 16) {
>   	 fail("no spilling support on 16-wide yet\n");
>         } else {

Hmm.  You're right...that should work fine.

There were a number of reasons I hadn't implemented spilling:
- Wrong data port caches
- g112-127 weren't reserved for use as MRFS, so we already lost
- I thought we had to use the new scratch read/write messages.

I fixed the first one, you fixed the second, and the third is just a 
nicety.  So this sounds good.

For the series:

NOTE: This is a candidate for release branches.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>