[Mesa-dev] [PATCH 1/7] i965: Add sensible disasm for the JMPI instruction.

[Eric Anholt]

We care about the jump distance, not that the first src is always the
ip register.
---
 src/mesa/drivers/dri/i965/brw_disasm.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 23ad3de..cfea1a3 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -74,7 +74,7 @@ struct {
     [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
-    [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 1, .ndst = 0 },
+    [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
     [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
     [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
     [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
@@ -932,6 +932,8 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 			    inst->header.opcode == BRW_OPCODE_ENDIF ||
 			    inst->header.opcode == BRW_OPCODE_WHILE)) {
        format (file, " %d", inst->bits1.branch_gen6.jump_count);
+    } else if (inst->header.opcode == BRW_OPCODE_JMPI) {
+       format (file, " %d", inst->bits3.d);
     }
 
     if (opcode[inst->header.opcode].nsrc > 0) {
-- 
1.7.7.3