[Mesa-dev] [PATCH] i965/gen7: Fix depth buffer rendering to tile offsets.

[Eric Anholt]

Previously, we were saying that everything from the starting tile to
region width+height was part of the limits of our depthbuffer, even if
the tile was near the bottom of the depthbuffer.  This mean that our
range was not clipping to buffer buonds if the start tile was anything
but the start of the buffer.

In bebc91f0f3a1f2d19d36a7f1a4f7c992ace064e9, this was changed to
saying that we're just rendering to a region of the size of the
renderbuffer.  This is great -- we get a range that should actually
match what we want.  However, the hardware's range checking occurs
after the X/Y offset addition, so we were clipping out rendering to
small depth mip levels when an X/Y offset was present.  Just add
tile_x/y to the width in that case -- the WM won't produce negative
x/y values pre-offset, so we just need to get the left/bottom sides of
the region to cover our buffer.

Fixes piglit fbo-clear-formats GL_ARB_depth_buffer_float on gen7.
(Full test run not completed yet because of memory leaks in master)
---
 src/mesa/drivers/dri/i965/brw_misc_state.c  |    4 ++--
 src/mesa/drivers/dri/i965/gen7_misc_state.c |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index f9652df..b6bca4b 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -376,8 +376,8 @@ static void emit_depthbuffer(struct brw_context *brw)
 		I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 		offset);
       OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
-		((depth_irb->Base.Width - 1) << 6) |
-		((depth_irb->Base.Height - 1) << 19));
+		(((depth_irb->Base.Width + tile_x)- 1) << 6) |
+		(((depth_irb->Base.Height + tile_y) - 1) << 19));
       OUT_BATCH(0);
 
       if (intel->is_g4x || intel->gen >= 5)
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 8a383f5..c2f58d5 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -107,8 +107,8 @@ static void emit_depthbuffer(struct brw_context *brw)
       OUT_RELOC(region->bo,
 	        I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 		offset);
-      OUT_BATCH(((drb->Base.Width - 1) << 4) |
-                ((drb->Base.Height - 1) << 18));
+      OUT_BATCH((((drb->Base.Width + tile_x) - 1) << 4) |
+                (((drb->Base.Height + tile_y) - 1) << 18));
       OUT_BATCH(0);
       OUT_BATCH(tile_x | (tile_y << 16));
       OUT_BATCH(0);
-- 
1.7.7.3