[Mesa-dev] [PATCH] i965/gen7: Fix depth buffer rendering to tile offsets.

[Eric Anholt]

On Wed, 11 Jan 2012 16:21:38 -0800, Chad Versace <chad.versace at linux.intel.com> wrote:
> On 01/11/2012 03:40 PM, Eric Anholt wrote:
> > diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
> > index 8a383f5..c2f58d5 100644
> > --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
> > @@ -107,8 +107,8 @@ static void emit_depthbuffer(struct brw_context *brw)
> >        OUT_RELOC(region->bo,
> >  	        I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
> >  		offset);
> > -      OUT_BATCH(((drb->Base.Width - 1) << 4) |
> > -                ((drb->Base.Height - 1) << 18));
> > +      OUT_BATCH((((drb->Base.Width + tile_x) - 1) << 4) |
> > +                (((drb->Base.Height + tile_y) - 1) << 18));
> >        OUT_BATCH(0);
> >        OUT_BATCH(tile_x | (tile_y << 16));
> >        OUT_BATCH(0);
> 
> The patch needs to do the same for the stencil buffer. I think the
> hunks below do the trick.  I did a full piglit run on gen7 with the
> extra hunks; regressions are fixed and no new ones are introduced.
> 
> I don't believe we have any tests for mipmapped depthstencil buffers
> that use the stencil bits, but we should.

Starting to correctly use tile offsets for stencil looks like an
independent fix to me, though it should land.  I've pushed my side of
the patch.
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