[Mesa-dev] [PATCH 2/3] i965/gen7: Set up texture horizontal alignment field.
Eric Anholt
eric at anholt.net
Tue Jan 17 16:57:08 PST 2012
This is required for Z16 support, which is the first thing to be
textured with horizontal alignment of 8.
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 25d4a3e..a4c82e5 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -74,6 +74,8 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
if (mt->align_h == 4)
surf->ss0.vertical_alignment = 1;
+ if (mt->align_w == 8)
+ surf->ss0.horizontal_alignment = 1;
surf->ss0.surface_type = translate_tex_target(tObj->Target);
surf->ss0.surface_format = translate_tex_format(mt->format,
@@ -94,7 +96,6 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
gen7_set_surface_tiling(surf, intelObj->mt->region->tiling);
/* ss0 remaining fields:
- * - horizontal_alignment
* - vert_line_stride (exists on gen6 but we ignore it)
* - vert_line_stride_ofs (exists on gen6 but we ignore it)
* - surface_array_spacing
--
1.7.7.3
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