[Mesa-dev] [PATCH] r600g: fix inconsistency with INTERP* opcode definitions
Vadim Girlin
vadimgirlin at gmail.com
Tue Jan 24 06:22:20 PST 2012
Signed-off-by: Vadim Girlin <vadimgirlin at gmail.com>
---
src/gallium/drivers/r600/r600_asm.c | 6 +++---
src/gallium/drivers/r600/r600_opcodes.h | 10 +++++-----
src/gallium/drivers/r600/r600_shader.c | 6 +++---
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 8fce5a1..b78d64e 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -163,8 +163,8 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT:
@@ -192,7 +192,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_LOAD_P0:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT:
return 1;
diff --git a/src/gallium/drivers/r600/r600_opcodes.h b/src/gallium/drivers/r600/r600_opcodes.h
index e8582cc..eae1a83 100644
--- a/src/gallium/drivers/r600/r600_opcodes.h
+++ b/src/gallium/drivers/r600/r600_opcodes.h
@@ -433,16 +433,16 @@
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_PREV 0x000000D3
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULADD_PREV 0x000000D4
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULADD_IEEE_PREV 0x000000D5
-#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY 0x000000D6
-#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW 0x000000D7
-#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_X 0x000000D8
-#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_Z 0x000000D9
+#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY 0x000000D6
+#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW 0x000000D7
+#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_X 0x000000D8
+#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_Z 0x000000D9
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_STORE_FLAGS 0x000000DA
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOAD_STORE_FLAGS 0x000000DB
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_1A 0x000000DC
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_1A1D 0x000000DD
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_2A 0x000000DF
-#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_LOAD_P0 0x000000E0
+#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0 0x000000E0
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P10 0x000000E1
#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P20 0x000000E2
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index a3724c2..164b474 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -277,9 +277,9 @@ static int evergreen_interp_alu(struct r600_shader_ctx *ctx, int input)
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
if (i < 4)
- alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW;
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW;
else
- alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY;
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY;
if ((i > 1) && (i < 6)) {
alu.dst.sel = ctx->shader->input[input].gpr;
@@ -311,7 +311,7 @@ static int evergreen_interp_flat(struct r600_shader_ctx *ctx, int input)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
- alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_LOAD_P0;
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0;
alu.dst.sel = ctx->shader->input[input].gpr;
alu.dst.write = 1;
--
1.7.7.6
More information about the mesa-dev
mailing list