[Mesa-dev] [PATCH] i965/gen7: Always allocate push constant space before uploading.

[Eric Anholt]

It's not clear from the specs why this would be required, but it fixes
the regression in glean/fbo.  My theory is that push constant uploads
incrementally fill up the allocated space (with wrapping), but don't
synchronize on previous constant buffers being dereferenced when
overwriting after a wrap (or possibly they just don't write at all),
and this packet synchronizes on all previous push constant buffer
usage in the space.  Most applications don't run into trouble, because
some sort of nonpipelined update happens often enough to cause syncing
anyway.

But it's just a theory.
---
 src/mesa/drivers/dri/i965/brw_state.h        |    1 -
 src/mesa/drivers/dri/i965/brw_state_upload.c |    1 -
 src/mesa/drivers/dri/i965/gen7_urb.c         |   25 +------------------------
 src/mesa/drivers/dri/i965/gen7_vs_state.c    |    6 ++++++
 src/mesa/drivers/dri/i965/gen7_wm_state.c    |    6 ++++++
 5 files changed, 13 insertions(+), 26 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 2dd5665..fcfe79f 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -110,7 +110,6 @@ extern const struct brw_tracked_state gen7_clip_state;
 extern const struct brw_tracked_state gen7_depth_stencil_state_pointer;
 extern const struct brw_tracked_state gen7_disable_stages;
 extern const struct brw_tracked_state gen7_ps_state;
-extern const struct brw_tracked_state gen7_push_constant_alloc;
 extern const struct brw_tracked_state gen7_samplers;
 extern const struct brw_tracked_state gen7_sbe_state;
 extern const struct brw_tracked_state gen7_sf_clip_viewport;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index d071f87..c7b796c 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -188,7 +188,6 @@ const struct brw_tracked_state *gen7_atoms[] =
 
    /* Command packets: */
    &brw_invariant_state,
-   &gen7_push_constant_alloc,
 
    /* must do before binding table pointers, cc state ptrs */
    &brw_state_base_address,
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index e6cf1eb..419bdab 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -27,7 +27,7 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 
-/**
+/*
  * The following diagram shows how we partition the URB:
  *
  *      8kB         8kB              Rest of the URB space
@@ -50,29 +50,6 @@
  *
  * See "Volume 2a: 3D Pipeline," section 1.8.
  */
-static void
-gen7_allocate_push_constants(struct brw_context *brw)
-{
-   struct intel_context *intel = &brw->intel;
-   BEGIN_BATCH(2);
-   OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_VS << 16 | (2 - 2));
-   OUT_BATCH(8);
-   ADVANCE_BATCH();
-
-   BEGIN_BATCH(2);
-   OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_PS << 16 | (2 - 2));
-   OUT_BATCH(8 | 8 << GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT);
-   ADVANCE_BATCH();
-}
-
-const struct brw_tracked_state gen7_push_constant_alloc = {
-   .dirty = {
-      .mesa = 0,
-      .brw = BRW_NEW_CONTEXT,
-      .cache = 0,
-   },
-   .emit = gen7_allocate_push_constants,
-};
 
 static void
 gen7_upload_urb(struct brw_context *brw)
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 0746e6c..31fa060 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -46,6 +46,12 @@ upload_vs_state(struct brw_context *brw)
    OUT_BATCH(brw->sampler.offset);
    ADVANCE_BATCH();
 
+   /* See comment in gen7_urb.c to explain the allocation. */
+   BEGIN_BATCH(2);
+   OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_VS << 16 | (2 - 2));
+   OUT_BATCH(8);
+   ADVANCE_BATCH();
+
    if (brw->vs.push_const_size == 0) {
       /* Disable the push constant buffers. */
       BEGIN_BATCH(7);
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 32222f9..a1035f3 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -131,6 +131,12 @@ upload_ps_state(struct brw_context *brw)
    OUT_BATCH(brw->sampler.offset);
    ADVANCE_BATCH();
 
+   /* See comment in gen7_urb.c to explain the allocation. */
+   BEGIN_BATCH(2);
+   OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_PS << 16 | (2 - 2));
+   OUT_BATCH(8 | 8 << GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT);
+   ADVANCE_BATCH();
+
    /* CACHE_NEW_WM_PROG */
    if (brw->wm.prog_data->nr_params == 0) {
       /* Disable the push constant buffers. */
-- 
1.7.7.3