[Mesa-dev] [PATCH 06/19] r600g: set full register mask for CB_COLOR_CONTROL on evergreen

[Marek Olšák]

We don't set the other bits anywhere else.
---
 src/gallium/drivers/r600/evergreen_state.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 57942fb..7fd3a36 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -750,7 +750,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
 	blend->cb_target_mask = target_mask;
 	
 	r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
-				color_control, 0xFFFFFFFD, NULL, 0);
+				color_control, 0xFFFFFFFF, NULL, 0);
 
 	if (rctx->chip_class != CAYMAN)
 		r600_pipe_state_add_reg(rstate, R_028C3C_PA_SC_AA_MASK, 0xFFFFFFFF, 0xFFFFFFFF, NULL, 0);
-- 
1.7.5.4