[Mesa-dev] [PATCH 00/15] R600g cleanup and rework of cache flushing
Alex Deucher
alexdeucher at gmail.com
Mon Jan 30 12:58:13 PST 2012
On Mon, Jan 30, 2012 at 3:23 PM, Marek Olšák <maraeo at gmail.com> wrote:
> Hi everyone,
>
> This patch series is a follow-up to the previous one ("Remove all uses of the register mask"). First, it cleans up some code and merges r600_context into r600_pipe_context. The split of functionality between the two "contexts" made absolutely no sense.
>
> Next, it adds a new mechanism for emitting states. It's largely inspired by r300g and it's really simple, yet robust. (some people should seriously learn what "polymorphism" means and how it's used to write software before even writing drivers, because I feel like I am the only one making use of it in r600g, which is really a shame /rant) It can be used to schedule *any* commands for execution before the next draw operation, not just register updates. We'll use that more often in the future. For now, it's only used for cache flushes.
>
> Finally, this series completely reworks cache flushes. The problem with the old code was that the flags "last_flush" and "binding", which were stored in resource structs, were possible causes of race conditions. Not only does this new code fix that, it also simplifies the whole thing. The flushes are done explicitly when states are changed according to this scheme:
> bind_shader -> r600_inval_shader_cache
> set_constant_buffer -> r600_inval_shader_cache
> bind_vertex_elements -> r600_inval_shader_cache (for the fetch shader)
> bind_vertex_buffers -> r600_inval_vertex_cache
> bind_sampler_views -> r600_inval_texture_cache
> set_framebuffer -> r600_flush_framebuffer
> flush -> r600_flush_framebuffer
>
> Besides that, SURFACE_SYNC is called at most once between draw operations and flushes the whole memory range. The inval/flush functions only accumulate the flush flags.
>
> The rework also fixes flushes on RV670. The fbo-drawbuffers test no longer causes issues. Flushing CB1_DEST_BASE was not enough, DEST_BASE_0 must be flushed as well. This fixes 21 piglit tests on RV670. The flushing seems to be fixed finally, but the piglit results are not yet up to par with RV730.
>
> All this code has been tested on RV670, RV730, and REDWOOD.
>
> Please review.
Other than my comments about cayman in 8/15, this looks good.
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
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