[Mesa-dev] [PATCH 1/7] i965: Add support for AVG instruction.

Kenneth Graunke kenneth at whitecape.org
Thu Jul 12 10:54:17 PDT 2012


On 07/12/2012 10:43 AM, Paul Berry wrote:
> From the Ivy Bridge PRM, Vol4 Part3 p152:
> 
>     "The avg instruction performs component-wise integer average of
>     src0 and src1 and stores the results in dst. An integer average
>     uses integer upward rounding. It is equivalent to increment one to
>     the addition of src0 and src1 and then apply an arithmetic right
>     shift to this intermediate value."
> ---
>  src/mesa/drivers/dri/i965/brw_eu.h      |    1 +
>  src/mesa/drivers/dri/i965/brw_eu_emit.c |   22 ++++++++++++++++++++++
>  2 files changed, 23 insertions(+), 0 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
> index f25b09d..233b94c 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu.h
> +++ b/src/mesa/drivers/dri/i965/brw_eu.h
> @@ -861,6 +861,7 @@ ALU2(RSL)
>  ALU2(ASR)
>  ALU2(JMPI)
>  ALU2(ADD)
> +ALU2(AVG)
>  ALU2(MUL)
>  ALU1(FRC)
>  ALU1(RNDD)
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index 8de872e..93e84ae 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -929,6 +929,28 @@ struct brw_instruction *brw_ADD(struct brw_compile *p,
>     return brw_alu2(p, BRW_OPCODE_ADD, dest, src0, src1);
>  }
>  
> +struct brw_instruction *brw_AVG(struct brw_compile *p,
> +                                struct brw_reg dest,
> +                                struct brw_reg src0,
> +                                struct brw_reg src1)
> +{
> +   assert(dest.type == src0.type);
> +   assert(src0.type == src1.type);
> +   switch (src0.type) {
> +   case BRW_REGISTER_TYPE_B:
> +   case BRW_REGISTER_TYPE_UB:
> +   case BRW_REGISTER_TYPE_W:
> +   case BRW_REGISTER_TYPE_UW:
> +   case BRW_REGISTER_TYPE_D:
> +   case BRW_REGISTER_TYPE_UD:
> +      break;
> +   default:
> +      assert(!"Bad type for brw_AVG");
> +   }
> +
> +   return brw_alu2(p, BRW_OPCODE_AVG, dest, src0, src1);
> +}
> +
>  struct brw_instruction *brw_MUL(struct brw_compile *p,
>  				struct brw_reg dest,
>  				struct brw_reg src0,

Always nice to see the new instructions in use.

Patch 1 is:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>


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