[Mesa-dev] [PATCH 05/23] radeonsi: move scissor state to new state handling
Christian König
deathsimple at vodafone.de
Fri Jul 20 03:21:52 PDT 2012
Signed-off-by: Christian König <deathsimple at vodafone.de>
---
.../drivers/radeonsi/evergreen_hw_context.c | 8 ----
src/gallium/drivers/radeonsi/evergreen_state.c | 44 --------------------
src/gallium/drivers/radeonsi/radeonsi_pipe.h | 1 -
src/gallium/drivers/radeonsi/si_state.c | 25 +++++++++++
src/gallium/drivers/radeonsi/si_state.h | 1 +
5 files changed, 26 insertions(+), 53 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/evergreen_hw_context.c b/src/gallium/drivers/radeonsi/evergreen_hw_context.c
index d68e4b8..155489f 100644
--- a/src/gallium/drivers/radeonsi/evergreen_hw_context.c
+++ b/src/gallium/drivers/radeonsi/evergreen_hw_context.c
@@ -81,14 +81,6 @@ static const struct r600_reg si_context_reg_list[] = {
{R_028204_PA_SC_WINDOW_SCISSOR_TL, 0},
{R_028208_PA_SC_WINDOW_SCISSOR_BR, 0},
{R_02820C_PA_SC_CLIPRECT_RULE, 0},
- {R_028210_PA_SC_CLIPRECT_0_TL, 0},
- {R_028214_PA_SC_CLIPRECT_0_BR, 0},
- {R_028218_PA_SC_CLIPRECT_1_TL, 0},
- {R_02821C_PA_SC_CLIPRECT_1_BR, 0},
- {R_028220_PA_SC_CLIPRECT_2_TL, 0},
- {R_028224_PA_SC_CLIPRECT_2_BR, 0},
- {R_028228_PA_SC_CLIPRECT_3_TL, 0},
- {R_02822C_PA_SC_CLIPRECT_3_BR, 0},
{R_028230_PA_SC_EDGERULE, 0},
{R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0},
{R_028238_CB_TARGET_MASK, 0},
diff --git a/src/gallium/drivers/radeonsi/evergreen_state.c b/src/gallium/drivers/radeonsi/evergreen_state.c
index 025e317..cfae877 100644
--- a/src/gallium/drivers/radeonsi/evergreen_state.c
+++ b/src/gallium/drivers/radeonsi/evergreen_state.c
@@ -1254,49 +1254,6 @@ static void evergreen_set_sample_mask(struct pipe_context *pipe, unsigned sample
{
}
-static void evergreen_set_scissor_state(struct pipe_context *ctx,
- const struct pipe_scissor_state *state)
-{
- struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
- uint32_t tl, br;
-
- if (rstate == NULL)
- return;
-
- rstate->id = R600_PIPE_STATE_SCISSOR;
- tl = S_028240_TL_X(state->minx) | S_028240_TL_Y(state->miny);
- br = S_028244_BR_X(state->maxx) | S_028244_BR_Y(state->maxy);
- r600_pipe_state_add_reg(rstate,
- R_028210_PA_SC_CLIPRECT_0_TL, tl,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_028214_PA_SC_CLIPRECT_0_BR, br,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_028218_PA_SC_CLIPRECT_1_TL, tl,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_02821C_PA_SC_CLIPRECT_1_BR, br,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_028220_PA_SC_CLIPRECT_2_TL, tl,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_028224_PA_SC_CLIPRECT_2_BR, br,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_028228_PA_SC_CLIPRECT_3_TL, tl,
- NULL, 0);
- r600_pipe_state_add_reg(rstate,
- R_02822C_PA_SC_CLIPRECT_3_BR, br,
- NULL, 0);
-
- free(rctx->states[R600_PIPE_STATE_SCISSOR]);
- rctx->states[R600_PIPE_STATE_SCISSOR] = rstate;
- r600_context_pipe_state_set(rctx, rstate);
-}
-
static void evergreen_set_viewport_state(struct pipe_context *ctx,
const struct pipe_viewport_state *state)
{
@@ -1709,7 +1666,6 @@ void cayman_init_state_functions(struct r600_context *rctx)
rctx->context.set_framebuffer_state = evergreen_set_framebuffer_state;
rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
rctx->context.set_sample_mask = evergreen_set_sample_mask;
- rctx->context.set_scissor_state = evergreen_set_scissor_state;
rctx->context.set_stencil_ref = r600_set_pipe_stencil_ref;
rctx->context.set_vertex_buffers = r600_set_vertex_buffers;
rctx->context.set_index_buffer = r600_set_index_buffer;
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
index 66f4cdf..6e14f19 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
@@ -77,7 +77,6 @@ struct r600_atom_surface_sync {
enum r600_pipe_state_id {
R600_PIPE_STATE_CONFIG,
R600_PIPE_STATE_SEAMLESS_CUBEMAP,
- R600_PIPE_STATE_SCISSOR,
R600_PIPE_STATE_VIEWPORT,
R600_PIPE_STATE_RASTERIZER,
R600_PIPE_STATE_VGT,
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 9e52f86..68ff5cf 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -216,6 +216,30 @@ static void si_set_clip_state(struct pipe_context *ctx,
si_pm4_set_state(rctx, clip, pm4);
}
+static void si_set_scissor_state(struct pipe_context *ctx,
+ const struct pipe_scissor_state *state)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
+ uint32_t tl, br;
+
+ if (pm4 == NULL)
+ return;
+
+ tl = S_028240_TL_X(state->minx) | S_028240_TL_Y(state->miny);
+ br = S_028244_BR_X(state->maxx) | S_028244_BR_Y(state->maxy);
+ si_pm4_set_reg(pm4, R_028210_PA_SC_CLIPRECT_0_TL, tl);
+ si_pm4_set_reg(pm4, R_028214_PA_SC_CLIPRECT_0_BR, br);
+ si_pm4_set_reg(pm4, R_028218_PA_SC_CLIPRECT_1_TL, tl);
+ si_pm4_set_reg(pm4, R_02821C_PA_SC_CLIPRECT_1_BR, br);
+ si_pm4_set_reg(pm4, R_028220_PA_SC_CLIPRECT_2_TL, tl);
+ si_pm4_set_reg(pm4, R_028224_PA_SC_CLIPRECT_2_BR, br);
+ si_pm4_set_reg(pm4, R_028228_PA_SC_CLIPRECT_3_TL, tl);
+ si_pm4_set_reg(pm4, R_02822C_PA_SC_CLIPRECT_3_BR, br);
+
+ si_pm4_set_state(rctx, scissor, pm4);
+}
+
void si_init_state_functions(struct r600_context *rctx)
{
rctx->context.create_blend_state = si_create_blend_state;
@@ -224,4 +248,5 @@ void si_init_state_functions(struct r600_context *rctx)
rctx->context.set_blend_color = si_set_blend_color;
rctx->context.set_clip_state = si_set_clip_state;
+ rctx->context.set_scissor_state = si_set_scissor_state;
}
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index f5339cc..2797849 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -40,6 +40,7 @@ union si_state {
struct si_state_blend *blend;
struct si_pm4_state *blend_color;
struct si_pm4_state *clip;
+ struct si_pm4_state *scissor;
} named;
struct si_pm4_state *array[0];
};
--
1.7.9.5
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