[Mesa-dev] [PATCH 5/5] r200: get rid of dubious aux scissor bits

[Roland Scheidegger]

no point in emitting aux scissor values if we
a) never enable them
b) never set the actual values

plus it is enough to have that aux scissor enable reg (which we never set to
enable) in one place not two.
---
 src/mesa/drivers/dri/r200/r200_context.h    |   35 +++++++++++---------------
 src/mesa/drivers/dri/r200/r200_state_init.c |    4 ---
 2 files changed, 15 insertions(+), 24 deletions(-)

diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h
index e0d5693..778934d 100644
--- a/src/mesa/drivers/dri/r200/r200_context.h
+++ b/src/mesa/drivers/dri/r200/r200_context.h
@@ -442,19 +442,16 @@ struct r200_texture_state {
 #define CST_RB3D_DEPTHXY_OFFSET               3
 #define CST_CMD_2                             4
 #define CST_RE_AUX_SCISSOR_CNTL               5
-#define CST_CMD_3                             6
-#define CST_RE_SCISSOR_TL_0                   7
-#define CST_RE_SCISSOR_BR_0                   8
-#define CST_CMD_4                             9
-#define CST_SE_VAP_CNTL_STATUS                10
-#define CST_CMD_5                             11
-#define CST_RE_POINTSIZE                      12
-#define CST_CMD_6                             13
-#define CST_SE_TCL_INPUT_VTX_0                14
-#define CST_SE_TCL_INPUT_VTX_1                15
-#define CST_SE_TCL_INPUT_VTX_2                16
-#define CST_SE_TCL_INPUT_VTX_3                17
-#define CST_STATE_SIZE                        18
+#define CST_CMD_4                             6
+#define CST_SE_VAP_CNTL_STATUS                7
+#define CST_CMD_5                             8
+#define CST_RE_POINTSIZE                      9
+#define CST_CMD_6                             10
+#define CST_SE_TCL_INPUT_VTX_0                11
+#define CST_SE_TCL_INPUT_VTX_1                12
+#define CST_SE_TCL_INPUT_VTX_2                13
+#define CST_SE_TCL_INPUT_VTX_3                14
+#define CST_STATE_SIZE                        15
 
 #define PRF_CMD_0         0
 #define PRF_PP_TRI_PERF   1
@@ -462,13 +459,11 @@ struct r200_texture_state {
 #define PRF_STATE_SIZE    3
 
 
-#define SCI_CMD_0         0
-#define SCI_RE_AUX        1
-#define SCI_CMD_1         2
-#define SCI_XY_1          3
-#define SCI_CMD_2         4
-#define SCI_XY_2          5
-#define SCI_STATE_SIZE    6
+#define SCI_CMD_1         0
+#define SCI_XY_1          1
+#define SCI_CMD_2         2
+#define SCI_XY_2          3
+#define SCI_STATE_SIZE    4
 
 #define R200_QUERYOBJ_CMD_0  0
 #define R200_QUERYOBJ_DATA_0 1
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 2fe3f94..a19e858 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -762,7 +762,6 @@ void r200InitState( r200ContextPtr rmesa )
    rmesa->hw.cst.cmd[CST_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_CNTL_X);
    rmesa->hw.cst.cmd[CST_CMD_1] = cmdpkt(rmesa, R200_EMIT_RB3D_DEPTHXY_OFFSET);
    rmesa->hw.cst.cmd[CST_CMD_2] = cmdpkt(rmesa, R200_EMIT_RE_AUX_SCISSOR_CNTL);
-   rmesa->hw.cst.cmd[CST_CMD_3] = cmdpkt(rmesa, R200_EMIT_RE_SCISSOR_TL_0);
    rmesa->hw.cst.cmd[CST_CMD_4] = cmdpkt(rmesa, R200_EMIT_SE_VAP_CNTL_STATUS);
    rmesa->hw.cst.cmd[CST_CMD_5] = cmdpkt(rmesa, R200_EMIT_RE_POINTSIZE);
    rmesa->hw.cst.cmd[CST_CMD_6] = cmdpkt(rmesa, R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0);
@@ -815,7 +814,6 @@ void r200InitState( r200ContextPtr rmesa )
    rmesa->hw.prf.cmd[PRF_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TRI_PERF_CNTL);
    rmesa->hw.spr.cmd[SPR_CMD_0] = cmdpkt(rmesa, R200_EMIT_TCL_POINT_SPRITE_CNTL);
 
-   rmesa->hw.sci.cmd[SCI_CMD_0] = CP_PACKET0(R200_RE_AUX_SCISSOR_CNTL, 0);
    rmesa->hw.sci.cmd[SCI_CMD_1] = CP_PACKET0(R200_RE_TOP_LEFT, 0);
    rmesa->hw.sci.cmd[SCI_CMD_2] = CP_PACKET0(R200_RE_WIDTH_HEIGHT, 0);
 
@@ -1026,8 +1024,6 @@ void r200InitState( r200ContextPtr rmesa )
    rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;
    rmesa->hw.cst.cmd[CST_RB3D_DEPTHXY_OFFSET] = 0;
    rmesa->hw.cst.cmd[CST_RE_AUX_SCISSOR_CNTL] = 0x0;
-   rmesa->hw.cst.cmd[CST_RE_SCISSOR_TL_0] = 0;
-   rmesa->hw.cst.cmd[CST_RE_SCISSOR_BR_0] = 0;
    rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] =
 #ifdef MESA_BIG_ENDIAN
 						R200_VC_32BIT_SWAP;
-- 
1.7.7