[Mesa-dev] [PATCH] intel: increase wm thread number to 80 on gen6 GT2

[Kenneth Graunke]

On 07/26/2012 03:04 PM, Zou Nan hai wrote:
> It seems reset is not required for setting the max_wm_threads to 80 gen6 GT2.
> 
> Signed-off-by: Zou Nan hai <nanhai.zou at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_context.c |    6 +-----
>  1 files changed, 1 insertions(+), 5 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
> index faca726..e23e224 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -256,11 +256,7 @@ brwCreateContext(int api,
>        }
>     } else if (intel->gen == 6) {
>        if (intel->gt == 2) {
> -	 /* This could possibly be 80, but is supposed to require
> -	  * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
> -	  * GPU reset to change.
> -	  */
> -	 brw->max_wm_threads = 40;
> +	 brw->max_wm_threads = 80;
>  	 brw->max_vs_threads = 60;
>  	 brw->max_gs_threads = 60;
>  	 brw->urb.size = 64;            /* volume 5c.5 section 5.1 */

Pushed, thanks!  I added an Acked-by from Eric since I'd talked to him a
few days ago about making this change and he agreed that we should go
ahead and do it.