[Mesa-dev] [PATCH 16/22] i965: Add an offset argument to constant buffer setup.

[Eric Anholt]

We'll use this for UBO surfaces.
---
 src/mesa/drivers/dri/i965/brw_state.h             |    2 ++
 src/mesa/drivers/dri/i965/brw_vs_surface_state.c  |    2 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |    7 ++++---
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |    5 +++--
 src/mesa/drivers/dri/intel/intel_context.h        |    1 +
 5 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 68e92a8..8b99c52 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -187,6 +187,7 @@ uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 void brw_create_constant_surface(struct brw_context *brw,
 				 drm_intel_bo *bo,
+				 uint32_t offset,
 				 int width,
 				 uint32_t *out_offset);
 
@@ -214,6 +215,7 @@ void gen7_check_surface_setup(struct gen7_surface_state *surf,
 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 void gen7_create_constant_surface(struct brw_context *brw,
 				  drm_intel_bo *bo,
+				  uint32_t offset,
 				  int width,
 				  uint32_t *out_offset);
 
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index 534621c..2026145 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -95,7 +95,7 @@ brw_upload_vs_pull_constants(struct brw_context *brw)
    drm_intel_gem_bo_unmap_gtt(brw->vs.const_bo);
 
    const int surf = SURF_INDEX_VERT_CONST_BUFFER;
-   intel->vtbl.create_constant_surface(brw, brw->vs.const_bo,
+   intel->vtbl.create_constant_surface(brw, brw->vs.const_bo, 0,
 				       params->NumParameters,
 				       &brw->vs.surf_offset[surf]);
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 099668e..02800f8 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -766,6 +766,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
 void
 brw_create_constant_surface(struct brw_context *brw,
 			    drm_intel_bo *bo,
+			    uint32_t offset,
 			    int width,
 			    uint32_t *out_offset)
 {
@@ -783,7 +784,7 @@ brw_create_constant_surface(struct brw_context *brw,
    if (intel->gen >= 6)
       surf[0] |= BRW_SURFACE_RC_READ_WRITE;
 
-   surf[1] = bo->offset; /* reloc */
+   surf[1] = bo->offset + offset; /* reloc */
 
    surf[2] = ((w & 0x7f) << BRW_SURFACE_WIDTH_SHIFT |
 	      ((w >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT);
@@ -800,7 +801,7 @@ brw_create_constant_surface(struct brw_context *brw,
     */
    drm_intel_bo_emit_reloc(brw->intel.batch.bo,
 			   *out_offset + 4,
-			   bo, 0,
+			   bo, offset,
 			   I915_GEM_DOMAIN_SAMPLER, 0);
 }
 
@@ -936,7 +937,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
    }
    drm_intel_gem_bo_unmap_gtt(brw->wm.const_bo);
 
-   intel->vtbl.create_constant_surface(brw, brw->wm.const_bo,
+   intel->vtbl.create_constant_surface(brw, brw->wm.const_bo, 0,
 				       params->NumParameters,
 				       &brw->wm.surf_offset[surf_index]);
 
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 62d2be8..ed2326e 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -362,6 +362,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
 void
 gen7_create_constant_surface(struct brw_context *brw,
 			     drm_intel_bo *bo,
+			     uint32_t offset,
 			     int width,
 			     uint32_t *out_offset)
 {
@@ -378,7 +379,7 @@ gen7_create_constant_surface(struct brw_context *brw,
    surf->ss0.render_cache_read_write = 1;
 
    assert(bo);
-   surf->ss1.base_addr = bo->offset; /* reloc */
+   surf->ss1.base_addr = bo->offset + offset; /* reloc */
 
    surf->ss2.width = w & 0x7f;            /* bits 6:0 of size or width */
    surf->ss2.height = (w >> 7) & 0x1fff;  /* bits 19:7 of size or width */
@@ -400,7 +401,7 @@ gen7_create_constant_surface(struct brw_context *brw,
    drm_intel_bo_emit_reloc(brw->intel.batch.bo,
 			   (*out_offset +
 			    offsetof(struct gen7_surface_state, ss1)),
-			   bo, 0,
+			   bo, offset,
 			   I915_GEM_DOMAIN_SAMPLER, 0);
 
    gen7_check_surface_setup(surf, false /* is_render_target */);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 29ab187..4997cf0 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -197,6 +197,7 @@ struct intel_context
 					       unsigned unit);
       void (*create_constant_surface)(struct brw_context *brw,
 				      drm_intel_bo *bo,
+				      uint32_t offset,
 				      int width,
 				      uint32_t *out_offset);
       /** \} */
-- 
1.7.10.4