[Mesa-dev] Question regarding cs_gem_write_reloc in radeon_cs_gem.c

[Miguel Lopes Santos Ramos]

2012/6/21 Alex Deucher <alexdeucher at gmail.com>:
> If you just want to play with simple shaders and setting up the 3D
> pipeline, radeondemo is an easy place to start:
> http://cgit.freedesktop.org/~airlied/radeondemo
>
> Alex

Yes, I'm learning the assembly, because it helps me have a better
understanding of the architecture. I'm trying to find a research topic
in high-level programming language implementation.
r600 being a convenient and documented example of a GPU.

One month ago, my question to this list was "Loading and executing an
R600 program", you pointed radeondemo to me and then also Adam Rak's
HD-Radeon-Compute.

I have been reading that code and I want to write small programs such
as those in evergreen_shader.c. By now I understand most of it and
reproduced the functionality in my code avoiding the use of libdrm
(using ioctls directly).

However, I still didn't go past the pipeline setup, because I'd like
to test on my r600, not an evergreen (more convenient).
It appears that on the r600 setting up a single Pixel Shader is what
would be more similar to a "compute mode".

So, getting all those PM4 packets together to set up the pipeline has
not been easy.
I have been reading the R6xx_R7xx_3D and R6xx_3D_Registers pdfs from AMD.

It is a pitty that this packet communication is unidirectional, I
can't do a sort of ping and see if a small sequence of packets yielded
a given result.
I still didn't send my first sequence of PM4 packets using the
DRM_IOCTL_RADEON_CS, but that is my next step.

I'm working here: https://github.com/migle/trials/tree/master/radeon

But thanks, you all have been helpful, and I know where to go to when
I have a specific doubt.
For now, if you have an idea about a minimal sequence of PM4 packets for r600...

Right now, I'm reading r600_init_atom_start_cs in
mesa/src/gallium/drivers/r600/r600_state.c.

Thank you,

-- 
Miguel Ramos
PGP A006A14C