[Mesa-dev] [PATCH] Add F2I and I2F TGSI Opcodes to Radeon LLVM backend.

[Tom Stellard]

On Sat, May 05, 2012 at 10:19:28AM -0500, Aaron Watry wrote:
> Based on the code from llvmpipe.
> ---
>  .../drivers/radeon/radeon_setup_tgsi_llvm.c        |   30 ++++++++++++++++++++
>  1 files changed, 30 insertions(+), 0 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> index d3c493c..9f9b7cd 100644
> --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> @@ -329,6 +329,34 @@ static void bgnloop_emit(
>  	ctx->loop[ctx->loop_depth - 1].endloop_block = endloop_block;
>  }
>  
> +/* TGSI_OPCODE_F2I */
> +static void f2i_emit(
> +	const struct lp_build_tgsi_action * action,
> +	struct lp_build_tgsi_context * bld_base,
> +	struct lp_build_emit_data * emit_data)
> +{
> +	struct gallivm_state * gallivm = bld_base->base.gallivm;	
> +	const struct lp_type type = bld_base->base.type;
> +
> +	LLVMTypeRef int_type = lp_build_int_elem_type(gallivm, type);

int_type can be replaced with bld_base->int_bld.elem_type.  You will need
to initialize bld_base->int_bld in radeon_llvm_context_init() first, though.

> +	LLVMValueRef val = emit_data->args[0];
> +
> +	emit_data->output[emit_data->chan] = LLVMBuildFPToSI(gallivm->builder, val, int_type, "");
> +}
> +
> +/* TGSI_OPCODE_I2F */
> +static void i2f_emit(
> +	const struct lp_build_tgsi_action * action,
> +	struct lp_build_tgsi_context * bld_base,
> +	struct lp_build_emit_data * emit_data)
> +{
> +	struct gallivm_state * gallivm = bld_base->base.gallivm;
> +	const struct lp_type type = bld_base->base.type;
> +	LLVMTypeRef fp_type = lp_build_elem_type(gallivm, type);

fp_type should be bld_base->base.elem_type instead.

> +
> +	emit_data->output[emit_data->chan] = LLVMBuildSIToFP(gallivm->builder, emit_data->args[0], fp_type, "");
> +}
> +
>  static void brk_emit(
>  	const struct lp_build_tgsi_action * action,
>  	struct lp_build_tgsi_context * bld_base,
> @@ -584,11 +612,13 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
>  	bld_base->op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit;
>  	bld_base->op_actions[TGSI_OPCODE_EX2].emit = lp_build_tgsi_intrinsic;
>  	bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.AMDIL.exp.";
> +	bld_base->op_actions[TGSI_OPCODE_F2I].emit = f2i_emit;
>  	bld_base->op_actions[TGSI_OPCODE_FLR].emit = lp_build_tgsi_intrinsic;
>  	bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.AMDGPU.floor";
>  	bld_base->op_actions[TGSI_OPCODE_FRC].emit = lp_build_tgsi_intrinsic;
>  	bld_base->op_actions[TGSI_OPCODE_FRC].intr_name = "llvm.AMDIL.fraction.";
>  	bld_base->op_actions[TGSI_OPCODE_IF].emit = if_emit;
> +	bld_base->op_actions[TGSI_OPCODE_I2F].emit = i2f_emit;
>  	bld_base->op_actions[TGSI_OPCODE_KIL].emit = kil_emit;
>  	bld_base->op_actions[TGSI_OPCODE_KIL].intr_name = "llvm.AMDGPU.kill";
>  	bld_base->op_actions[TGSI_OPCODE_KILP].emit = lp_build_tgsi_intrinsic;
> -- 
> 1.7.5.4

If you resubmit with these changes, I'll commit (assuming there are no
piglit regressions).

-Tom

> 
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