[Mesa-dev] [PATCH 03/13] gallium/compute: Add PIPE_COMPUTE_CAP_IR_TARGET v3

Francisco Jerez currojerez at riseup.net
Mon May 28 13:05:01 PDT 2012


Tom Stellard <tstellar at gmail.com> writes:

> From: Francisco Jerez <currojerez at riseup.net>
>
> v2: Tom Stellard
>   - Update CAP description
>
> v3: Tom Stellard
>   - TGSI targets should pass an empty string for this CAP.
> ---
>
> I think we can let TGSI drivers leave this as an empty string for now and
> then revisit it once the TGSI backend is complete.
>
>  src/gallium/docs/source/screen.rst   |    5 +++++
>  src/gallium/include/pipe/p_defines.h |    1 +
>  2 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
> index 2bddf1b..3c42bfc 100644
> --- a/src/gallium/docs/source/screen.rst
> +++ b/src/gallium/docs/source/screen.rst
> @@ -206,6 +206,11 @@ PIPE_COMPUTE_CAP_*
>  Compute-specific capabilities. They can be queried using
>  pipe_screen::get_compute_param.
>  
> +* ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target as a target
> +  triple specification of the form ``processor-manufacturer-os`` that will
> +  be passed on to the compiler. If a driver accepts compute programs in
> +  the common TGSI representation, then it should return an empty string for
> +  this CAP. Value type: null-terminated string.

Maybe we could be more specific and say that this cap is only used when
the shader IR is LLVM?  In other cases I don't think it makes sense to
say that drivers should return anything if we're never going to ask
them.

>  * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
>    for grid and block coordinates.  Value type: ``uint64_t``.
>  * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
> diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
> index d0819e2..585cab2 100644
> --- a/src/gallium/include/pipe/p_defines.h
> +++ b/src/gallium/include/pipe/p_defines.h
> @@ -546,6 +546,7 @@ enum pipe_shader_ir
>   */
>  enum pipe_compute_cap
>  {
> +   PIPE_COMPUTE_CAP_IR_TARGET,
>     PIPE_COMPUTE_CAP_GRID_DIMENSION,
>     PIPE_COMPUTE_CAP_MAX_GRID_SIZE,
>     PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE,
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