[Mesa-dev] [PATCH 3/6] i965: Generalize GL_FIXED VS w/a support

[Kenneth Graunke]

On 10/22/2012 10:21 AM, Eric Anholt wrote:
> Chris Forbes <chrisf at ijw.co.nz> writes:
>
>> Next few patches build on this to add other workarounds
>> for packed formats.
>
>> diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h
>> index adeff7f..9da4cb0 100644
>> --- a/src/mesa/drivers/dri/i965/brw_vs.h
>> +++ b/src/mesa/drivers/dri/i965/brw_vs.h
>> @@ -39,13 +39,21 @@
>>   #include "brw_program.h"
>>   #include "program/program.h"
>>
>> +/* fixup bits for gl_packed_input_flags,
>> + * to enable various VS workarounds */
>> +#define BRW_ATTRIB_WA_COMPONENTS    7  /* mask for GL_FIXED scale channel count */
>> +#define BRW_ATTRIB_WA_NORMALIZE     8  /* normalize in shader */
>> +#define BRW_ATTRIB_WA_BGRA          16 /* swap r/b channels in shader */
>> +#define BRW_ATTRIB_WA_SIGN          32 /* interpret as signed in shader */
>> +#define BRW_ATTRIB_WA_SCALE         64 /* interpret as scaled in shader */
>
> For bitmasks, we usually call a more-than-one-bit mask
> BRW_WHATEVER_MASK.  Perhaps BRW_ATTRIB_GL_FIXED_COMPONENTS_MASK?.  For
> the others, (1 << bit) as the value is preferred.  I think
> BRA_ATTRIB_WA_SCALE whould be BRW_ATTRIB_WA_NORMALIZED, since in our
> hardware SCALED refers to casting the integer value to a float, and the
> last thing we need in vertex upload is more confusion about formats! :)
>
> Other than that, looks good.

Eric,

Do we actually need to record the size and writemask off channels when 
applying the GL_FIXED rescaling (or such)?  I didn't think attributes 
were packed, so each attribute would take up a whole vec4, and we can 
just MUL the whole register and not worry about it.

That would simplify the code that applies the workarounds a bit, and 
also allow us to use an ordinary bitfield here.

--Ken