[Mesa-dev] [PATCH 2/4] gallium: Add PIPE_SHADER_CAP_INDIRECT_TEMP_ARRAY_ADDR

[Brian Paul]

On 11/05/2012 01:14 PM, Tom Stellard wrote:
> From: Tom Stellard<thomas.stellard at amd.com>
>
> ---
>   src/gallium/docs/source/screen.rst           | 2 ++
>   src/gallium/drivers/r600/r600_pipe.c         | 2 ++
>   src/gallium/drivers/radeonsi/radeonsi_pipe.c | 1 +
>   src/gallium/include/pipe/p_defines.h         | 3 ++-
>   4 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
> index 6c89171..60fdc3a 100644
> --- a/src/gallium/docs/source/screen.rst
> +++ b/src/gallium/docs/source/screen.rst
> @@ -211,6 +211,8 @@ to be 0.
>     samplers.
>   * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
>     program.  It should be one of the ``pipe_shader_ir`` enum values.
> +* ``PIPE_SHADER_CAP_INDIRECT_TEMP_ARRAY_ADDR``: Whether indirect addressing
> +  of the temporary array file is supported.

Is it correct to say that TGSI_FILE_TEMPORARY_ARRAY is only used when 
this cap is true?

I think the docs for TGSI_FILE_TEMPORARY_ARRAY leave something to be 
desired.  Maybe you or someone else could try to add more 
documentation for that.

In the other patch, when you query 
PIPE_SHADER_CAP_INDIRECT_TEMP_ARRAY_ADDR it seems you're really just 
querying whether the TGSI_FILE_TEMPORARY_ARRAY file is supported, 
regardless of whether or not it's dynamically indexed, right?

Maybe a better name for the cap would be PIPE_SHADER_CAP_TEMP_ARRAY to 
indicate whether TGSI_FILE_TEMPORARY_ARRAY is accepted by the driver. 
  The expectation is that it would typically be indexed with an 
address register.  I assume "INDIRECT" means dynamic indexing.


>
>
>   .. _pipe_compute_cap:
> diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
> index b5280e3..abe7ad7 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -563,6 +563,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
>   			return PIPE_SHADER_IR_TGSI;
>   		}
>   	}
> +	case PIPE_SHADER_CAP_INDIRECT_TEMP_ARRAY_ADDR:
> +		return 0;
>   	return 0;
>   }
>
> diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
> index fa16f4c..1a1235f 100644
> --- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
> +++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
> @@ -463,6 +463,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
>   	case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
>   	case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
>   	case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> +	case PIPE_SHADER_CAP_INDIRECT_TEMP_ARRAY_ADDR:
>   		return 0;
>   	case PIPE_SHADER_CAP_INTEGERS:
>   		return 1;
> diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
> index 184136e..0841528 100644
> --- a/src/gallium/include/pipe/p_defines.h
> +++ b/src/gallium/include/pipe/p_defines.h
> @@ -533,7 +533,8 @@ enum pipe_shader_cap
>      PIPE_SHADER_CAP_SUBROUTINES = 16, /* BGNSUB, ENDSUB, CAL, RET */
>      PIPE_SHADER_CAP_INTEGERS = 17,
>      PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS = 18,
> -   PIPE_SHADER_CAP_PREFERRED_IR = 19
> +   PIPE_SHADER_CAP_PREFERRED_IR = 19,
> +   PIPE_SHADER_CAP_INDIRECT_TEMP_ARRAY_ADDR = 20
>   };
>
>   /**