[Mesa-dev] [PATCH 1/4] R600: Add helper function for setting instruction modifiers
Tom Stellard
tom at stellard.net
Fri Nov 9 12:47:34 PST 2012
From: Tom Stellard <thomas.stellard at amd.com>
---
lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 11 +++--------
lib/Target/AMDGPU/R600InstrInfo.cpp | 11 ++++++++++-
lib/Target/AMDGPU/R600InstrInfo.h | 3 +++
3 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
index f9fd65d..e040e4c 100644
--- a/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
+++ b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
@@ -192,12 +192,9 @@ bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
AMDGPU::ZERO); // src1
TII->addFlag(PredSet, 0, MO_FLAG_MASK);
if (Flags & MO_FLAG_PUSH) {
- PredSet->getOperand(TII->getOperandIdx(
- *PredSet, R600Operands::UPDATE_EXEC_MASK)).setImm(1);
+ TII->setImmOperand(PredSet, R600Operands::UPDATE_EXEC_MASK, 1);
} else {
- PredSet->getOperand(
- TII->getOperandIdx(
- *PredSet, R600Operands::UPDATE_PREDICATE)).setImm(1);
+ TII->setImmOperand(PredSet, R600Operands::UPDATE_PREDICATE, 1);
}
MI.eraseFromParent();
continue;
@@ -209,9 +206,7 @@ bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
AMDGPU::ZERO,
AMDGPU::ZERO);
TII->addFlag(PredSet, 0, MO_FLAG_MASK);
- PredSet->getOperand(
- TII->getOperandIdx(
- *PredSet, R600Operands::UPDATE_EXEC_MASK)).setImm(1);
+ TII->setImmOperand(PredSet, R600Operands::UPDATE_EXEC_MASK, 1);
BuildMI(MBB, I, MBB.findDebugLoc(I),
TII->get(AMDGPU::BREAK_LOGICALNZ_i32))
diff --git a/lib/Target/AMDGPU/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp
index 49169d7..7c5b19e 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -528,7 +528,7 @@ MachineInstr *R600InstrInfo::buildMovImm(MachineBasicBlock &BB,
{
MachineInstr *MovImm = buildDefaultInstruction(BB, I, AMDGPU::MOV, DstReg,
AMDGPU::ALU_LITERAL_X);
- MovImm->getOperand(getOperandIdx(*MovImm, R600Operands::IMM)).setImm(Imm);
+ setImmOperand(MovImm, R600Operands::IMM, Imm);
return MovImm;
}
@@ -573,6 +573,15 @@ int R600InstrInfo::getOperandIdx(const MachineInstr &MI,
return OpTable[OpTableIdx][Op];
}
+void R600InstrInfo::setImmOperand(MachineInstr *MI, R600Operands::Ops Op,
+ int64_t Imm) const
+{
+ int Idx = getOperandIdx(*MI, Op);
+ assert(Idx != -1 && "Operand not supported for this instruction.");
+ assert(MI->getOperand(Idx).isImm());
+ MI->getOperand(Idx).setImm(Imm);
+}
+
//===----------------------------------------------------------------------===//
// Instruction flag getters/setters
//===----------------------------------------------------------------------===//
diff --git a/lib/Target/AMDGPU/R600InstrInfo.h b/lib/Target/AMDGPU/R600InstrInfo.h
index 3cf3cc1..cec1c3b 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.h
+++ b/lib/Target/AMDGPU/R600InstrInfo.h
@@ -130,6 +130,9 @@ namespace llvm {
/// if the Instruction does not contain the specified Op.
int getOperandIdx(const MachineInstr &MI, R600Operands::Ops Op) const;
+ /// setImmOperand - Helper function for setting instruction flag values.
+ void setImmOperand(MachineInstr *MI, R600Operands::Ops Op, int64_t Imm) const;
+
///hasFlagOperand - Returns true if this instruction has an operand for
/// storing target flags.
bool hasFlagOperand(const MachineInstr &MI) const;
--
1.7.11.4
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