[Mesa-dev] [PATCH 1/2] i965/fs: Add helper functions for generating ALU ops, like in the VS.
Eric Anholt
eric at anholt.net
Fri Nov 9 13:34:43 PST 2012
This gives us checking of our arguments (no more passing 1 operand to
BRW_OPCODE_MUL!), at the cost of a couple of extra parens.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 41 +++-
src/mesa/drivers/dri/i965/brw_fs.h | 20 ++
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 95 ++++----
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 302 +++++++++++++-------------
4 files changed, 245 insertions(+), 213 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index dc2e5a6..950053e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -132,6 +132,36 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst,
assert(src[2].reg_offset >= 0);
}
+#define ALU1(op) \
+ fs_inst * \
+ fs_visitor::op(fs_reg dst, fs_reg src0) \
+ { \
+ return new(mem_ctx) fs_inst(BRW_OPCODE_##op, dst, src0); \
+ }
+
+#define ALU2(op) \
+ fs_inst * \
+ fs_visitor::op(fs_reg dst, fs_reg src0, fs_reg src1) \
+ { \
+ return new(mem_ctx) fs_inst(BRW_OPCODE_##op, dst, src0, src1); \
+ }
+
+ALU1(NOT)
+ALU1(MOV)
+ALU1(FRC)
+ALU1(RNDD)
+ALU1(RNDE)
+ALU1(RNDZ)
+ALU2(ADD)
+ALU2(MUL)
+ALU2(MACH)
+ALU2(AND)
+ALU2(OR)
+ALU2(XOR)
+ALU2(SHL)
+ALU2(SHR)
+ALU2(ASR)
+
bool
fs_inst::equals(fs_inst *inst)
{
@@ -600,15 +630,15 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir)
/* gl_FragCoord.x */
if (ir->pixel_center_integer) {
- emit(BRW_OPCODE_MOV, wpos, this->pixel_x);
+ emit(MOV(wpos, this->pixel_x));
} else {
- emit(BRW_OPCODE_ADD, wpos, this->pixel_x, fs_reg(0.5f));
+ emit(ADD(wpos, this->pixel_x, fs_reg(0.5f)));
}
wpos.reg_offset++;
/* gl_FragCoord.y */
if (!flip && ir->pixel_center_integer) {
- emit(BRW_OPCODE_MOV, wpos, this->pixel_y);
+ emit(MOV(wpos, this->pixel_y));
} else {
fs_reg pixel_y = this->pixel_y;
float offset = (ir->pixel_center_integer ? 0.0 : 0.5);
@@ -618,14 +648,13 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir)
offset += c->key.drawable_height - 1.0;
}
- emit(BRW_OPCODE_ADD, wpos, pixel_y, fs_reg(offset));
+ emit(ADD(wpos, pixel_y, fs_reg(offset)));
}
wpos.reg_offset++;
/* gl_FragCoord.z */
if (intel->gen >= 6) {
- emit(BRW_OPCODE_MOV, wpos,
- fs_reg(brw_vec8_grf(c->source_depth_reg, 0)));
+ emit(MOV(wpos, fs_reg(brw_vec8_grf(c->source_depth_reg, 0))));
} else {
emit(FS_OPCODE_LINTERP, wpos,
this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 4845176..75b3b00 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -213,6 +213,7 @@ public:
void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
fs_inst *emit(fs_inst inst);
+ fs_inst *emit(fs_inst *inst);
fs_inst *emit(enum opcode opcode);
fs_inst *emit(enum opcode opcode, fs_reg dst);
@@ -221,6 +222,25 @@ public:
fs_inst *emit(enum opcode opcode, fs_reg dst,
fs_reg src0, fs_reg src1, fs_reg src2);
+ fs_inst *MOV(fs_reg dst, fs_reg src);
+ fs_inst *NOT(fs_reg dst, fs_reg src);
+ fs_inst *RNDD(fs_reg dst, fs_reg src);
+ fs_inst *RNDE(fs_reg dst, fs_reg src);
+ fs_inst *RNDZ(fs_reg dst, fs_reg src);
+ fs_inst *FRC(fs_reg dst, fs_reg src);
+ fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
+ fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
+ uint32_t condition);
+
int type_size(const struct glsl_type *type);
fs_inst *get_instruction_generating_reg(fs_inst *start,
fs_inst *end,
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index c0a8810..a5b3f7a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -104,7 +104,7 @@ fs_visitor::emit_fp_scalar_write(const struct prog_instruction *fpi,
{
for (int i = 0; i < 4; i++) {
if (fpi->DstReg.WriteMask & (1 << i))
- emit(BRW_OPCODE_MOV, regoffset(dst, i), src);
+ emit(MOV(regoffset(dst, i), src));
}
}
@@ -136,7 +136,7 @@ fs_visitor::emit_fragment_program_code()
* mov.f0 dst 1.0
*/
fs_reg one = fs_reg(this, glsl_type::float_type);
- emit(BRW_OPCODE_MOV, one, fs_reg(1.0f));
+ emit(MOV(one, fs_reg(1.0f)));
for (unsigned int insn = 0; insn < fp->Base.NumInstructions; insn++) {
const struct prog_instruction *fpi = &fp->Base.Instructions[insn];
@@ -202,16 +202,14 @@ fs_visitor::emit_fragment_program_code()
default: assert(!"not reached"); count = 0; break;
}
- emit(BRW_OPCODE_MUL, acc,
- regoffset(src[0], 0), regoffset(src[1], 0));
+ emit(MUL(acc, regoffset(src[0], 0), regoffset(src[1], 0)));
for (int i = 1; i < count; i++) {
- emit(BRW_OPCODE_MUL, mul,
- regoffset(src[0], i), regoffset(src[1], i));
- emit(BRW_OPCODE_ADD, acc, acc, mul);
+ emit(MUL(mul, regoffset(src[0], i), regoffset(src[1], i)));
+ emit(ADD(acc, acc, mul));
}
if (fpi->Opcode == OPCODE_DPH)
- emit(BRW_OPCODE_ADD, acc, acc, regoffset(src[1], 3));
+ emit(ADD(acc, acc, regoffset(src[1], 3)));
emit_fp_scalar_write(fpi, dst, acc);
break;
@@ -219,15 +217,15 @@ fs_visitor::emit_fragment_program_code()
case OPCODE_DST:
if (fpi->DstReg.WriteMask & WRITEMASK_X)
- emit(BRW_OPCODE_MOV, dst, fs_reg(1.0f));
+ emit(MOV(dst, fs_reg(1.0f)));
if (fpi->DstReg.WriteMask & WRITEMASK_Y) {
- emit(BRW_OPCODE_MUL, regoffset(dst, 1),
- regoffset(src[0], 1), regoffset(src[1], 1));
+ emit(MUL(regoffset(dst, 1),
+ regoffset(src[0], 1), regoffset(src[1], 1)));
}
if (fpi->DstReg.WriteMask & WRITEMASK_Z)
- emit(BRW_OPCODE_MOV, regoffset(dst, 2), regoffset(src[0], 2));
+ emit(MOV(regoffset(dst, 2), regoffset(src[0], 2)));
if (fpi->DstReg.WriteMask & WRITEMASK_W)
- emit(BRW_OPCODE_MOV, regoffset(dst, 3), regoffset(src[1], 3));
+ emit(MOV(regoffset(dst, 3), regoffset(src[1], 3)));
break;
case OPCODE_EX2:
@@ -289,7 +287,7 @@ fs_visitor::emit_fragment_program_code()
* brw_wm_emit.c either.
*/
if (fpi->DstReg.WriteMask & WRITEMASK_X)
- emit(BRW_OPCODE_MOV, regoffset(dst, 0), fs_reg(1.0f));
+ emit(MOV(regoffset(dst, 0), fs_reg(1.0f)));
if (fpi->DstReg.WriteMask & WRITEMASK_YZ) {
fs_inst *inst;
@@ -298,8 +296,8 @@ fs_visitor::emit_fragment_program_code()
inst->conditional_mod = BRW_CONDITIONAL_LE;
if (fpi->DstReg.WriteMask & WRITEMASK_Y) {
- emit(BRW_OPCODE_MOV, regoffset(dst, 1), regoffset(src[0], 0));
- inst = emit(BRW_OPCODE_MOV, regoffset(dst, 1), fs_reg(0.0f));
+ emit(MOV(regoffset(dst, 1), regoffset(src[0], 0)));
+ inst = emit(MOV(regoffset(dst, 1), fs_reg(0.0f)));
inst->predicate = BRW_PREDICATE_NORMAL;
}
@@ -307,13 +305,13 @@ fs_visitor::emit_fragment_program_code()
emit_math(SHADER_OPCODE_POW, regoffset(dst, 2),
regoffset(src[0], 1), regoffset(src[0], 3));
- inst = emit(BRW_OPCODE_MOV, regoffset(dst, 2), fs_reg(0.0f));
+ inst = emit(MOV(regoffset(dst, 2), fs_reg(0.0f)));
inst->predicate = BRW_PREDICATE_NORMAL;
}
}
if (fpi->DstReg.WriteMask & WRITEMASK_W)
- emit(BRW_OPCODE_MOV, regoffset(dst, 3), fs_reg(1.0f));
+ emit(MOV(regoffset(dst, 3), fs_reg(1.0f)));
break;
@@ -324,11 +322,10 @@ fs_visitor::emit_fragment_program_code()
neg_src0.negate = !neg_src0.negate;
fs_reg temp = fs_reg(this, glsl_type::float_type);
fs_reg temp2 = fs_reg(this, glsl_type::float_type);
- emit(BRW_OPCODE_ADD, temp, neg_src0, fs_reg(1.0f));
- emit(BRW_OPCODE_MUL, temp, temp, regoffset(src[2], i));
- emit(BRW_OPCODE_MUL, temp2,
- regoffset(src[0], i), regoffset(src[1], i));
- emit(BRW_OPCODE_ADD, regoffset(dst, i), temp, temp2);
+ emit(ADD(temp, neg_src0, fs_reg(1.0f)));
+ emit(MUL(temp, temp, regoffset(src[2], i)));
+ emit(MUL(temp2, regoffset(src[0], i), regoffset(src[1], i)));
+ emit(ADD(regoffset(dst, i), temp, temp2));
}
}
break;
@@ -337,10 +334,8 @@ fs_visitor::emit_fragment_program_code()
for (int i = 0; i < 4; i++) {
if (fpi->DstReg.WriteMask & (1 << i)) {
fs_reg temp = fs_reg(this, glsl_type::float_type);
- emit(BRW_OPCODE_MUL, temp,
- regoffset(src[0], i), regoffset(src[1], i));
- emit(BRW_OPCODE_ADD, regoffset(dst, i),
- temp, regoffset(src[2], i));
+ emit(MUL(temp, regoffset(src[0], i), regoffset(src[1], i)));
+ emit(ADD(regoffset(dst, i), temp, regoffset(src[2], i)));
}
}
break;
@@ -435,8 +430,8 @@ fs_visitor::emit_fragment_program_code()
fs_reg invproj = fs_reg(this, glsl_type::float_type);
emit_math(SHADER_OPCODE_RCP, invproj, regoffset(src[0], 3));
for (int i = 0; i < 3; i++) {
- emit(BRW_OPCODE_MUL, regoffset(coordinate, i),
- regoffset(src[0], i), invproj);
+ emit(MUL(regoffset(coordinate, i),
+ regoffset(src[0], i), invproj));
}
break;
}
@@ -481,8 +476,8 @@ fs_visitor::emit_fragment_program_code()
temp, regoffset(abscoord, 2));
emit_math(SHADER_OPCODE_RCP, temp, temp);
for (int i = 0; i < 3; i++) {
- emit(BRW_OPCODE_MUL, regoffset(cubecoord, i),
- regoffset(coordinate, i), temp);
+ emit(MUL(regoffset(cubecoord, i),
+ regoffset(coordinate, i), temp));
}
coordinate = cubecoord;
@@ -542,12 +537,10 @@ fs_visitor::emit_fragment_program_code()
fs_reg temp = fs_reg(this, glsl_type::float_type);
fs_reg neg_src1_1 = regoffset(src[1], i1);
neg_src1_1.negate = !neg_src1_1.negate;
- emit(BRW_OPCODE_MUL, temp,
- regoffset(src[0], i2), neg_src1_1);
- emit(BRW_OPCODE_MUL, regoffset(dst, i),
- regoffset(src[0], i1), regoffset(src[1], i2));
- emit(BRW_OPCODE_ADD, regoffset(dst, i),
- regoffset(dst, i), temp);
+ emit(MUL(temp, regoffset(src[0], i2), neg_src1_1));
+ emit(MUL(regoffset(dst, i),
+ regoffset(src[0], i1), regoffset(src[1], i2)));
+ emit(ADD(regoffset(dst, i), regoffset(dst, i), temp));
}
}
break;
@@ -568,9 +561,8 @@ fs_visitor::emit_fragment_program_code()
for (int i = 0; i < 4; i++) {
if (fpi->DstReg.WriteMask & (1 << i)) {
- fs_inst *inst = emit(BRW_OPCODE_MOV,
- regoffset(real_dst, i),
- regoffset(dst, i));
+ fs_inst *inst = emit(MOV(regoffset(real_dst, i),
+ regoffset(dst, i)));
inst->saturate = fpi->SaturateMode;
}
}
@@ -585,7 +577,7 @@ fs_visitor::emit_fragment_program_code()
this->current_annotation = "result.depth write";
if (frag_depth.file != BAD_FILE) {
fs_reg temp = fs_reg(this, glsl_type::float_type);
- emit(BRW_OPCODE_MOV, temp, regoffset(frag_depth, 2));
+ emit(MOV(temp, regoffset(frag_depth, 2)));
frag_depth = temp;
}
}
@@ -638,12 +630,9 @@ fs_visitor::setup_fp_regs()
fp_input_regs[i] = *emit_general_interpolation(ir);
if (i == FRAG_ATTRIB_FOGC) {
- emit(BRW_OPCODE_MOV,
- regoffset(fp_input_regs[i], 1), fs_reg(0.0f));
- emit(BRW_OPCODE_MOV,
- regoffset(fp_input_regs[i], 2), fs_reg(0.0f));
- emit(BRW_OPCODE_MOV,
- regoffset(fp_input_regs[i], 3), fs_reg(1.0f));
+ emit(MOV(regoffset(fp_input_regs[i], 1), fs_reg(0.0f)));
+ emit(MOV(regoffset(fp_input_regs[i], 2), fs_reg(0.0f)));
+ emit(MOV(regoffset(fp_input_regs[i], 3), fs_reg(1.0f)));
}
break;
@@ -731,8 +720,8 @@ fs_visitor::get_fp_src_reg(const prog_src_register *src)
result = fs_reg(this, glsl_type::vec4_type);
for (int i = 0; i < 4; i++) {
- emit(BRW_OPCODE_MOV, regoffset(result, i),
- fs_reg(plist->ParameterValues[src->Index][i].f));
+ emit(MOV(regoffset(result, i),
+ fs_reg(plist->ParameterValues[src->Index][i].f)));
}
break;
}
@@ -765,15 +754,15 @@ fs_visitor::get_fp_src_reg(const prog_src_register *src)
*/
int src_swiz = GET_SWZ(src->Swizzle, i);
if (src_swiz == SWIZZLE_ZERO) {
- emit(BRW_OPCODE_MOV, regoffset(result, i), fs_reg(0.0f));
+ emit(MOV(regoffset(result, i), fs_reg(0.0f)));
} else if (src_swiz == SWIZZLE_ONE) {
- emit(BRW_OPCODE_MOV, regoffset(result, i),
- negate ? fs_reg(-1.0f) : fs_reg(1.0f));
+ emit(MOV(regoffset(result, i),
+ negate ? fs_reg(-1.0f) : fs_reg(1.0f)));
} else {
fs_reg src = regoffset(unswizzled, src_swiz);
if (negate)
src.negate = !src.negate;
- emit(BRW_OPCODE_MOV, regoffset(result, i), src);
+ emit(MOV(regoffset(result, i), src));
}
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 2dd212a..41ecaa2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -218,7 +218,7 @@ fs_visitor::try_emit_saturate(ir_expression *ir)
*/
fs_inst *modify = get_instruction_generating_reg(pre_inst, last_inst, src);
if (!modify || modify->regs_written() != 1) {
- fs_inst *inst = emit(BRW_OPCODE_MOV, this->result, src);
+ fs_inst *inst = emit(MOV(this->result, src));
inst->saturate = true;
} else {
modify->saturate = true;
@@ -310,7 +310,7 @@ fs_visitor::visit(ir_expression *ir)
/* Note that BRW_OPCODE_NOT is not appropriate here, since it is
* ones complement of the whole register, not just bit 0.
*/
- emit(BRW_OPCODE_XOR, this->result, op[0], fs_reg(1));
+ emit(XOR(this->result, op[0], fs_reg(1)));
break;
case ir_unop_neg:
op[0].negate = !op[0].negate;
@@ -324,16 +324,16 @@ fs_visitor::visit(ir_expression *ir)
case ir_unop_sign:
temp = fs_reg(this, ir->type);
- emit(BRW_OPCODE_MOV, this->result, fs_reg(0.0f));
+ emit(MOV(this->result, fs_reg(0.0f)));
inst = emit(BRW_OPCODE_CMP, reg_null_f, op[0], fs_reg(0.0f));
inst->conditional_mod = BRW_CONDITIONAL_G;
- inst = emit(BRW_OPCODE_MOV, this->result, fs_reg(1.0f));
+ inst = emit(MOV(this->result, fs_reg(1.0f)));
inst->predicate = BRW_PREDICATE_NORMAL;
inst = emit(BRW_OPCODE_CMP, reg_null_f, op[0], fs_reg(0.0f));
inst->conditional_mod = BRW_CONDITIONAL_L;
- inst = emit(BRW_OPCODE_MOV, this->result, fs_reg(-1.0f));
+ inst = emit(MOV(this->result, fs_reg(-1.0f)));
inst->predicate = BRW_PREDICATE_NORMAL;
break;
@@ -368,7 +368,7 @@ fs_visitor::visit(ir_expression *ir)
break;
case ir_binop_add:
- emit(BRW_OPCODE_ADD, this->result, op[0], op[1]);
+ emit(ADD(this->result, op[0], op[1]));
break;
case ir_binop_sub:
assert(!"not reached: should be handled by ir_sub_to_add_neg");
@@ -389,11 +389,11 @@ fs_visitor::visit(ir_expression *ir)
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_D);
- emit(BRW_OPCODE_MUL, acc, op[0], op[1]);
- emit(BRW_OPCODE_MACH, reg_null_d, op[0], op[1]);
- emit(BRW_OPCODE_MOV, this->result, fs_reg(acc));
+ emit(MUL(acc, op[0], op[1]));
+ emit(MACH(reg_null_d, op[0], op[1]));
+ emit(MOV(this->result, fs_reg(acc)));
} else {
- emit(BRW_OPCODE_MUL, this->result, op[0], op[1]);
+ emit(MUL(this->result, op[0], op[1]));
}
break;
case ir_binop_div:
@@ -437,15 +437,15 @@ fs_visitor::visit(ir_expression *ir)
break;
case ir_binop_logic_xor:
- emit(BRW_OPCODE_XOR, this->result, op[0], op[1]);
+ emit(XOR(this->result, op[0], op[1]));
break;
case ir_binop_logic_or:
- emit(BRW_OPCODE_OR, this->result, op[0], op[1]);
+ emit(OR(this->result, op[0], op[1]));
break;
case ir_binop_logic_and:
- emit(BRW_OPCODE_AND, this->result, op[0], op[1]);
+ emit(AND(this->result, op[0], op[1]));
break;
case ir_binop_dot:
@@ -488,47 +488,47 @@ fs_visitor::visit(ir_expression *ir)
case ir_unop_u2f:
case ir_unop_f2i:
case ir_unop_f2u:
- emit(BRW_OPCODE_MOV, this->result, op[0]);
+ emit(MOV(this->result, op[0]));
break;
case ir_unop_b2i:
- inst = emit(BRW_OPCODE_AND, this->result, op[0], fs_reg(1));
+ inst = emit(AND(this->result, op[0], fs_reg(1)));
break;
case ir_unop_b2f:
temp = fs_reg(this, glsl_type::int_type);
- emit(BRW_OPCODE_AND, temp, op[0], fs_reg(1));
- emit(BRW_OPCODE_MOV, this->result, temp);
+ emit(AND(temp, op[0], fs_reg(1)));
+ emit(MOV(this->result, temp));
break;
case ir_unop_f2b:
inst = emit(BRW_OPCODE_CMP, this->result, op[0], fs_reg(0.0f));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
- emit(BRW_OPCODE_AND, this->result, this->result, fs_reg(1));
+ emit(AND(this->result, this->result, fs_reg(1)));
break;
case ir_unop_i2b:
assert(op[0].type == BRW_REGISTER_TYPE_D);
inst = emit(BRW_OPCODE_CMP, this->result, op[0], fs_reg(0));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
- emit(BRW_OPCODE_AND, this->result, this->result, fs_reg(1));
+ emit(AND(this->result, this->result, fs_reg(1)));
break;
case ir_unop_trunc:
- emit(BRW_OPCODE_RNDZ, this->result, op[0]);
+ emit(RNDZ(this->result, op[0]));
break;
case ir_unop_ceil:
op[0].negate = !op[0].negate;
- inst = emit(BRW_OPCODE_RNDD, this->result, op[0]);
+ inst = emit(RNDD(this->result, op[0]));
this->result.negate = true;
break;
case ir_unop_floor:
- inst = emit(BRW_OPCODE_RNDD, this->result, op[0]);
+ inst = emit(RNDD(this->result, op[0]));
break;
case ir_unop_fract:
- inst = emit(BRW_OPCODE_FRC, this->result, op[0]);
+ inst = emit(FRC(this->result, op[0]));
break;
case ir_unop_round_even:
- emit(BRW_OPCODE_RNDE, this->result, op[0]);
+ emit(RNDE(this->result, op[0]));
break;
case ir_binop_min:
@@ -545,27 +545,27 @@ fs_visitor::visit(ir_expression *ir)
break;
case ir_unop_bit_not:
- inst = emit(BRW_OPCODE_NOT, this->result, op[0]);
+ inst = emit(NOT(this->result, op[0]));
break;
case ir_binop_bit_and:
- inst = emit(BRW_OPCODE_AND, this->result, op[0], op[1]);
+ inst = emit(AND(this->result, op[0], op[1]));
break;
case ir_binop_bit_xor:
- inst = emit(BRW_OPCODE_XOR, this->result, op[0], op[1]);
+ inst = emit(XOR(this->result, op[0], op[1]));
break;
case ir_binop_bit_or:
- inst = emit(BRW_OPCODE_OR, this->result, op[0], op[1]);
+ inst = emit(OR(this->result, op[0], op[1]));
break;
case ir_binop_lshift:
- inst = emit(BRW_OPCODE_SHL, this->result, op[0], op[1]);
+ inst = emit(SHL(this->result, op[0], op[1]));
break;
case ir_binop_rshift:
if (ir->type->base_type == GLSL_TYPE_INT)
- inst = emit(BRW_OPCODE_ASR, this->result, op[0], op[1]);
+ inst = emit(ASR(this->result, op[0], op[1]));
else
- inst = emit(BRW_OPCODE_SHR, this->result, op[0], op[1]);
+ inst = emit(SHR(this->result, op[0], op[1]));
break;
case ir_binop_ubo_load:
@@ -592,7 +592,7 @@ fs_visitor::visit(ir_expression *ir)
packed_consts, fs_reg(0u)));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
} else {
- emit(fs_inst(BRW_OPCODE_MOV, result, packed_consts));
+ emit(MOV(result, packed_consts));
}
packed_consts.smear++;
@@ -622,7 +622,7 @@ fs_visitor::emit_assignment_writes(fs_reg &l, fs_reg &r,
r.type = brw_type_for_base_type(type);
if (predicated || !l.equals(r)) {
- fs_inst *inst = emit(BRW_OPCODE_MOV, l, r);
+ fs_inst *inst = emit(MOV(l, r));
inst->predicate = predicated ? BRW_PREDICATE_NORMAL : BRW_PREDICATE_NONE;
}
@@ -722,7 +722,7 @@ fs_visitor::visit(ir_assignment *ir)
ir->lhs->type->is_vector()) {
for (int i = 0; i < ir->lhs->type->vector_elements; i++) {
if (ir->write_mask & (1 << i)) {
- inst = emit(BRW_OPCODE_MOV, l, r);
+ inst = emit(MOV(l, r));
if (ir->condition)
inst->predicate = BRW_PREDICATE_NORMAL;
r.reg_offset++;
@@ -748,7 +748,7 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
if (ir->shadow_comparitor) {
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i), coordinate));
coordinate.reg_offset++;
}
/* gen4's SIMD8 sampler always has the slots for u,v,r present. */
@@ -758,20 +758,20 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
/* There's no plain shadow compare message, so we use shadow
* compare with a bias of 0.0.
*/
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), fs_reg(0.0f));
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), fs_reg(0.0f)));
mlen++;
} else if (ir->op == ir_txb || ir->op == ir_txl) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
mlen++;
} else {
assert(!"Should not get here.");
}
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), shadow_c);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), shadow_c));
mlen++;
} else if (ir->op == ir_tex) {
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i), coordinate));
coordinate.reg_offset++;
}
/* gen4's SIMD8 sampler always has the slots for u,v,r present. */
@@ -780,7 +780,7 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
fs_reg &dPdx = lod;
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i), coordinate));
coordinate.reg_offset++;
}
/* the slots for u and v are always present, but r is optional */
@@ -801,20 +801,20 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
* m5 m6 m7 m8 m9 m10
*/
for (int i = 0; i < ir->lod_info.grad.dPdx->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdx);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), dPdx));
dPdx.reg_offset++;
}
mlen += MAX2(ir->lod_info.grad.dPdx->type->vector_elements, 2);
for (int i = 0; i < ir->lod_info.grad.dPdy->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdy);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), dPdy));
dPdy.reg_offset++;
}
mlen += MAX2(ir->lod_info.grad.dPdy->type->vector_elements, 2);
} else if (ir->op == ir_txs) {
/* There's no SIMD8 resinfo message on Gen4. Use SIMD16 instead. */
simd16 = true;
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod));
mlen += 2;
} else {
/* Oh joy. gen4 doesn't have SIMD8 non-shadow-compare bias/lod
@@ -824,8 +824,8 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
assert(ir->op == ir_txb || ir->op == ir_txl || ir->op == ir_txf);
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i * 2, coordinate.type),
- coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i * 2, coordinate.type),
+ coordinate));
coordinate.reg_offset++;
}
@@ -833,13 +833,13 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
* be necessary for TXF (ld), but seems wise to do for all messages.
*/
for (int i = ir->coordinate->type->vector_elements; i < 3; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i * 2), fs_reg(0.0f));
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i * 2), fs_reg(0.0f)));
}
/* lod/bias appears after u/v/r. */
mlen += 6;
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, lod.type), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen, lod.type), lod));
mlen++;
/* The unused upper half. */
@@ -886,7 +886,7 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
if (simd16) {
for (int i = 0; i < 4; i++) {
- emit(BRW_OPCODE_MOV, orig_dst, dst);
+ emit(MOV(orig_dst, dst));
orig_dst.reg_offset++;
dst.reg_offset += 2;
}
@@ -922,10 +922,9 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
*/
ir_constant *offset = ir->offset->as_constant();
for (int i = 0; i < vector_elements; i++) {
- emit(BRW_OPCODE_ADD,
- fs_reg(MRF, base_mrf + mlen + i * reg_width, coordinate.type),
- coordinate,
- offset->value.i[i]);
+ emit(ADD(fs_reg(MRF, base_mrf + mlen + i * reg_width, coordinate.type),
+ coordinate,
+ offset->value.i[i]));
coordinate.reg_offset++;
}
} else {
@@ -939,9 +938,8 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
}
for (int i = 0; i < vector_elements; i++) {
- emit(BRW_OPCODE_MOV,
- fs_reg(MRF, base_mrf + mlen + i * reg_width, coordinate.type),
- coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i * reg_width, coordinate.type),
+ coordinate));
coordinate.reg_offset++;
}
}
@@ -950,7 +948,7 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
if (ir->shadow_comparitor) {
mlen = MAX2(mlen, header_present + 4 * reg_width);
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), shadow_c);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), shadow_c));
mlen += reg_width;
}
@@ -961,14 +959,14 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
break;
case ir_txb:
mlen = MAX2(mlen, header_present + 4 * reg_width);
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
mlen += reg_width;
inst = emit(FS_OPCODE_TXB, dst);
break;
case ir_txl:
mlen = MAX2(mlen, header_present + 4 * reg_width);
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
mlen += reg_width;
inst = emit(SHADER_OPCODE_TXL, dst);
@@ -986,11 +984,11 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
* - dPdx.x dPdy.x dPdx.y dPdy.y dPdx.z dPdy.z
*/
for (int i = 0; i < ir->lod_info.grad.dPdx->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
lod.reg_offset++;
mlen += reg_width;
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod2);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod2));
lod2.reg_offset++;
mlen += reg_width;
}
@@ -999,16 +997,15 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
break;
}
case ir_txs:
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod));
mlen += reg_width;
inst = emit(SHADER_OPCODE_TXS, dst);
break;
case ir_txf:
mlen = header_present + 4 * reg_width;
- emit(BRW_OPCODE_MOV,
- fs_reg(MRF, base_mrf + mlen - reg_width, BRW_REGISTER_TYPE_UD),
- lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen - reg_width, BRW_REGISTER_TYPE_UD),
+ lod));
inst = emit(SHADER_OPCODE_TXF, dst);
break;
}
@@ -1043,7 +1040,7 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
}
if (ir->shadow_comparitor) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), shadow_c);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), shadow_c));
mlen += reg_width;
}
@@ -1052,11 +1049,11 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
case ir_tex:
break;
case ir_txb:
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
mlen += reg_width;
break;
case ir_txl:
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
mlen += reg_width;
break;
case ir_txd: {
@@ -1067,22 +1064,22 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
* [hdr], [ref], x, dPdx.x, dPdy.x, y, dPdx.y, dPdy.y, z, dPdx.z, dPdy.z
*/
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), coordinate));
coordinate.reg_offset++;
mlen += reg_width;
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod));
lod.reg_offset++;
mlen += reg_width;
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod2);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), lod2));
lod2.reg_offset++;
mlen += reg_width;
}
break;
}
case ir_txs:
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod));
mlen += reg_width;
break;
case ir_txf:
@@ -1101,17 +1098,17 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
}
/* Unfortunately, the parameters for LD are intermixed: u, lod, v, r. */
- emit(BRW_OPCODE_ADD,
- fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D), coordinate, offsets[0]);
+ emit(ADD(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D),
+ coordinate, offsets[0]));
coordinate.reg_offset++;
mlen += reg_width;
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D), lod);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D), lod));
mlen += reg_width;
for (int i = 1; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_ADD,
- fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D), coordinate, offsets[i]);
+ emit(ADD(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D),
+ coordinate, offsets[i]));
coordinate.reg_offset++;
mlen += reg_width;
}
@@ -1121,7 +1118,7 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
/* Set up the coordinate (except for cases where it was done above) */
if (ir->op != ir_txd && ir->op != ir_txs && ir->op != ir_txf) {
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), coordinate);
+ emit(MOV(fs_reg(MRF, base_mrf + mlen), coordinate));
coordinate.reg_offset++;
mlen += reg_width;
}
@@ -1201,10 +1198,10 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate,
fs_reg src = coordinate;
coordinate = dst;
- emit(BRW_OPCODE_MUL, dst, src, scale_x);
+ emit(MUL(dst, src, scale_x));
dst.reg_offset++;
src.reg_offset++;
- emit(BRW_OPCODE_MUL, dst, src, scale_y);
+ emit(MUL(dst, src, scale_y));
} else if (is_rect) {
/* On gen6+, the sampler handles the rectangle coordinates
* natively, without needing rescaling. But that means we have
@@ -1228,7 +1225,7 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate,
* parameter type, so just invert back.
*/
fs_reg limit = fs_reg(this, glsl_type::float_type);
- emit(BRW_OPCODE_MOV, limit, i == 0 ? scale_x : scale_y);
+ emit(MOV(limit, i == 0 ? scale_x : scale_y));
emit(SHADER_OPCODE_RCP, limit, limit);
inst = emit(BRW_OPCODE_SEL, chan, chan, limit);
@@ -1244,7 +1241,7 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate,
fs_reg chan = coordinate;
chan.reg_offset += i;
- fs_inst *inst = emit(BRW_OPCODE_MOV, chan, chan);
+ fs_inst *inst = emit(MOV(chan, chan));
inst->saturate = true;
}
}
@@ -1360,13 +1357,13 @@ fs_visitor::swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler)
l.reg_offset += i;
if (swiz == SWIZZLE_ZERO) {
- emit(BRW_OPCODE_MOV, l, fs_reg(0.0f));
+ emit(MOV(l, fs_reg(0.0f)));
} else if (swiz == SWIZZLE_ONE) {
- emit(BRW_OPCODE_MOV, l, fs_reg(1.0f));
+ emit(MOV(l, fs_reg(1.0f)));
} else {
fs_reg r = orig_val;
r.reg_offset += GET_SWZ(c->key.tex.swizzles[sampler], i);
- emit(BRW_OPCODE_MOV, l, r);
+ emit(MOV(l, r));
}
}
this->result = swizzled_result;
@@ -1407,7 +1404,7 @@ fs_visitor::visit(ir_swizzle *ir)
}
channel.reg_offset += swiz;
- emit(BRW_OPCODE_MOV, result, channel);
+ emit(MOV(result, channel));
result.reg_offset++;
}
}
@@ -1442,7 +1439,7 @@ fs_visitor::visit(ir_constant *ir)
dst_reg.type = src_reg.type;
for (unsigned j = 0; j < size; j++) {
- emit(BRW_OPCODE_MOV, dst_reg, src_reg);
+ emit(MOV(dst_reg, src_reg));
src_reg.reg_offset++;
dst_reg.reg_offset++;
}
@@ -1457,7 +1454,7 @@ fs_visitor::visit(ir_constant *ir)
dst_reg.type = src_reg.type;
for (unsigned j = 0; j < size; j++) {
- emit(BRW_OPCODE_MOV, dst_reg, src_reg);
+ emit(MOV(dst_reg, src_reg));
src_reg.reg_offset++;
dst_reg.reg_offset++;
}
@@ -1468,16 +1465,16 @@ fs_visitor::visit(ir_constant *ir)
for (unsigned i = 0; i < size; i++) {
switch (ir->type->base_type) {
case GLSL_TYPE_FLOAT:
- emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.f[i]));
+ emit(MOV(dst_reg, fs_reg(ir->value.f[i])));
break;
case GLSL_TYPE_UINT:
- emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.u[i]));
+ emit(MOV(dst_reg, fs_reg(ir->value.u[i])));
break;
case GLSL_TYPE_INT:
- emit(BRW_OPCODE_MOV, dst_reg, fs_reg(ir->value.i[i]));
+ emit(MOV(dst_reg, fs_reg(ir->value.i[i])));
break;
case GLSL_TYPE_BOOL:
- emit(BRW_OPCODE_MOV, dst_reg, fs_reg((int)ir->value.b[i]));
+ emit(MOV(dst_reg, fs_reg((int)ir->value.b[i])));
break;
default:
assert(!"Non-float/uint/int/bool constant");
@@ -1510,7 +1507,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir)
switch (expr->operation) {
case ir_unop_logic_not:
- inst = emit(BRW_OPCODE_AND, reg_null_d, op[0], fs_reg(1));
+ inst = emit(AND(reg_null_d, op[0], fs_reg(1)));
inst->conditional_mod = BRW_CONDITIONAL_Z;
break;
@@ -1523,7 +1520,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir)
if (intel->gen >= 6) {
inst = emit(BRW_OPCODE_CMP, reg_null_d, op[0], fs_reg(0.0f));
} else {
- inst = emit(BRW_OPCODE_MOV, reg_null_f, op[0]);
+ inst = emit(MOV(reg_null_f, op[0]));
}
inst->conditional_mod = BRW_CONDITIONAL_NZ;
break;
@@ -1532,7 +1529,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir)
if (intel->gen >= 6) {
inst = emit(BRW_OPCODE_CMP, reg_null_d, op[0], fs_reg(0));
} else {
- inst = emit(BRW_OPCODE_MOV, reg_null_d, op[0]);
+ inst = emit(MOV(reg_null_d, op[0]));
}
inst->conditional_mod = BRW_CONDITIONAL_NZ;
break;
@@ -1564,7 +1561,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir)
out:
ir->accept(this);
- fs_inst *inst = emit(BRW_OPCODE_AND, reg_null_d, this->result, fs_reg(1));
+ fs_inst *inst = emit(AND(reg_null_d, this->result, fs_reg(1)));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
}
@@ -1603,14 +1600,14 @@ fs_visitor::emit_if_gen6(ir_if *ir)
case ir_binop_logic_or:
temp = fs_reg(this, glsl_type::bool_type);
- emit(BRW_OPCODE_OR, temp, op[0], op[1]);
+ emit(OR(temp, op[0], op[1]));
inst = emit(BRW_OPCODE_IF, reg_null_d, temp, fs_reg(0));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
return;
case ir_binop_logic_and:
temp = fs_reg(this, glsl_type::bool_type);
- emit(BRW_OPCODE_AND, temp, op[0], op[1]);
+ emit(AND(temp, op[0], op[1]));
inst = emit(BRW_OPCODE_IF, reg_null_d, temp, fs_reg(0));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
return;
@@ -1715,7 +1712,7 @@ fs_visitor::visit(ir_loop *ir)
this->base_ir = ir->from;
ir->from->accept(this);
- emit(BRW_OPCODE_MOV, counter, this->result);
+ emit(MOV(counter, this->result));
}
}
@@ -1743,7 +1740,7 @@ fs_visitor::visit(ir_loop *ir)
if (ir->increment) {
this->base_ir = ir->increment;
ir->increment->accept(this);
- emit(BRW_OPCODE_ADD, counter, counter, this->result);
+ emit(ADD(counter, counter, this->result));
}
this->base_ir = NULL;
@@ -1810,18 +1807,24 @@ fs_visitor::emit(fs_inst inst)
{
fs_inst *list_inst = new(mem_ctx) fs_inst;
*list_inst = inst;
+ emit(list_inst);
+ return list_inst;
+}
+fs_inst *
+fs_visitor::emit(fs_inst *inst)
+{
if (force_uncompressed_stack > 0)
- list_inst->force_uncompressed = true;
+ inst->force_uncompressed = true;
else if (force_sechalf_stack > 0)
- list_inst->force_sechalf = true;
+ inst->force_sechalf = true;
- list_inst->annotation = this->current_annotation;
- list_inst->ir = this->base_ir;
+ inst->annotation = this->current_annotation;
+ inst->ir = this->base_ir;
- this->instructions.push_tail(list_inst);
+ this->instructions.push_tail(inst);
- return list_inst;
+ return inst;
}
/** Emits a dummy fragment shader consisting of magenta for bringup purposes. */
@@ -1831,10 +1834,10 @@ fs_visitor::emit_dummy_fs()
int reg_width = c->dispatch_width / 8;
/* Everyone's favorite color. */
- emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 0 * reg_width), fs_reg(1.0f));
- emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 1 * reg_width), fs_reg(0.0f));
- emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 2 * reg_width), fs_reg(1.0f));
- emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 3 * reg_width), fs_reg(0.0f));
+ emit(MOV(fs_reg(MRF, 2 + 0 * reg_width), fs_reg(1.0f)));
+ emit(MOV(fs_reg(MRF, 2 + 1 * reg_width), fs_reg(0.0f)));
+ emit(MOV(fs_reg(MRF, 2 + 2 * reg_width), fs_reg(1.0f)));
+ emit(MOV(fs_reg(MRF, 2 + 3 * reg_width), fs_reg(0.0f)));
fs_inst *write;
write = emit(FS_OPCODE_FB_WRITE, fs_reg(0), fs_reg(0));
@@ -1884,10 +1887,10 @@ fs_visitor::emit_interpolation_setup_gen4()
this->delta_y[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] =
fs_reg(this, glsl_type::float_type);
}
- emit(BRW_OPCODE_ADD, this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
- this->pixel_x, fs_reg(negate(brw_vec1_grf(1, 0))));
- emit(BRW_OPCODE_ADD, this->delta_y[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
- this->pixel_y, fs_reg(negate(brw_vec1_grf(1, 1))));
+ emit(ADD(this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
+ this->pixel_x, fs_reg(negate(brw_vec1_grf(1, 0)))));
+ emit(ADD(this->delta_y[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
+ this->pixel_y, fs_reg(negate(brw_vec1_grf(1, 1)))));
this->current_annotation = "compute pos.w and 1/pos.w";
/* Compute wpos.w. It's always in our setup, since it's needed to
@@ -1916,14 +1919,12 @@ fs_visitor::emit_interpolation_setup_gen6()
fs_reg int_pixel_y = fs_reg(this, glsl_type::uint_type);
int_pixel_x.type = BRW_REGISTER_TYPE_UW;
int_pixel_y.type = BRW_REGISTER_TYPE_UW;
- emit(BRW_OPCODE_ADD,
- int_pixel_x,
- fs_reg(stride(suboffset(g1_uw, 4), 2, 4, 0)),
- fs_reg(brw_imm_v(0x10101010)));
- emit(BRW_OPCODE_ADD,
- int_pixel_y,
- fs_reg(stride(suboffset(g1_uw, 5), 2, 4, 0)),
- fs_reg(brw_imm_v(0x11001100)));
+ emit(ADD(int_pixel_x,
+ fs_reg(stride(suboffset(g1_uw, 4), 2, 4, 0)),
+ fs_reg(brw_imm_v(0x10101010))));
+ emit(ADD(int_pixel_y,
+ fs_reg(stride(suboffset(g1_uw, 5), 2, 4, 0)),
+ fs_reg(brw_imm_v(0x11001100))));
/* As of gen6, we can no longer mix float and int sources. We have
* to turn the integer pixel centers into floats for their actual
@@ -1931,8 +1932,8 @@ fs_visitor::emit_interpolation_setup_gen6()
*/
this->pixel_x = fs_reg(this, glsl_type::float_type);
this->pixel_y = fs_reg(this, glsl_type::float_type);
- emit(BRW_OPCODE_MOV, this->pixel_x, int_pixel_x);
- emit(BRW_OPCODE_MOV, this->pixel_y, int_pixel_y);
+ emit(MOV(this->pixel_x, int_pixel_x));
+ emit(MOV(this->pixel_y, int_pixel_y));
this->current_annotation = "compute pos.w";
this->pixel_w = fs_reg(brw_vec8_grf(c->source_w_reg, 0));
@@ -1979,9 +1980,9 @@ fs_visitor::emit_color_write(int target, int index, int first_color_mrf)
* m + 6: a0
* m + 7: a1
*/
- inst = emit(BRW_OPCODE_MOV,
- fs_reg(MRF, first_color_mrf + index * reg_width, color.type),
- color);
+ inst = emit(MOV(fs_reg(MRF, first_color_mrf + index * reg_width,
+ color.type),
+ color));
inst->saturate = c->key.clamp_fragment_color;
} else {
/* pre-gen6 SIMD16 single source DP write looks like:
@@ -2000,24 +2001,21 @@ fs_visitor::emit_color_write(int target, int index, int first_color_mrf)
* usual destination + 1 for the second half we get
* destination + 4.
*/
- inst = emit(BRW_OPCODE_MOV,
- fs_reg(MRF, BRW_MRF_COMPR4 + first_color_mrf + index,
- color.type),
- color);
+ inst = emit(MOV(fs_reg(MRF, BRW_MRF_COMPR4 + first_color_mrf + index,
+ color.type),
+ color));
inst->saturate = c->key.clamp_fragment_color;
} else {
push_force_uncompressed();
- inst = emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index,
- color.type),
- color);
+ inst = emit(MOV(fs_reg(MRF, first_color_mrf + index, color.type),
+ color));
inst->saturate = c->key.clamp_fragment_color;
pop_force_uncompressed();
push_force_sechalf();
color.sechalf = true;
- inst = emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index + 4,
- color.type),
- color);
+ inst = emit(MOV(fs_reg(MRF, first_color_mrf + index + 4, color.type),
+ color));
inst->saturate = c->key.clamp_fragment_color;
pop_force_sechalf();
color.sechalf = false;
@@ -2069,8 +2067,8 @@ fs_visitor::emit_fb_writes()
if (c->aa_dest_stencil_reg) {
push_force_uncompressed();
- emit(BRW_OPCODE_MOV, fs_reg(MRF, nr++),
- fs_reg(brw_vec8_grf(c->aa_dest_stencil_reg, 0)));
+ emit(MOV(fs_reg(MRF, nr++),
+ fs_reg(brw_vec8_grf(c->aa_dest_stencil_reg, 0))));
pop_force_uncompressed();
}
@@ -2095,18 +2093,18 @@ fs_visitor::emit_fb_writes()
if (c->computes_depth) {
/* Hand over gl_FragDepth. */
assert(this->frag_depth.file != BAD_FILE);
- emit(BRW_OPCODE_MOV, fs_reg(MRF, nr), this->frag_depth);
+ emit(MOV(fs_reg(MRF, nr), this->frag_depth));
} else {
/* Pass through the payload depth. */
- emit(BRW_OPCODE_MOV, fs_reg(MRF, nr),
- fs_reg(brw_vec8_grf(c->source_depth_reg, 0)));
+ emit(MOV(fs_reg(MRF, nr),
+ fs_reg(brw_vec8_grf(c->source_depth_reg, 0))));
}
nr += reg_width;
}
if (c->dest_depth_reg) {
- emit(BRW_OPCODE_MOV, fs_reg(MRF, nr),
- fs_reg(brw_vec8_grf(c->dest_depth_reg, 0)));
+ emit(MOV(fs_reg(MRF, nr),
+ fs_reg(brw_vec8_grf(c->dest_depth_reg, 0))));
nr += reg_width;
}
@@ -2117,9 +2115,7 @@ fs_visitor::emit_fb_writes()
this->current_annotation = ralloc_asprintf(this->mem_ctx,
"FB write src0");
for (int i = 0; i < 4; i++) {
- fs_inst *inst = emit(BRW_OPCODE_MOV,
- fs_reg(MRF, color_mrf + i, src0.type),
- src0);
+ fs_inst *inst = emit(MOV(fs_reg(MRF, color_mrf + i, src0.type), src0));
src0.reg_offset++;
inst->saturate = c->key.clamp_fragment_color;
}
@@ -2127,9 +2123,8 @@ fs_visitor::emit_fb_writes()
this->current_annotation = ralloc_asprintf(this->mem_ctx,
"FB write src1");
for (int i = 0; i < 4; i++) {
- fs_inst *inst = emit(BRW_OPCODE_MOV,
- fs_reg(MRF, color_mrf + 4 + i, src1.type),
- src1);
+ fs_inst *inst = emit(MOV(fs_reg(MRF, color_mrf + 4 + i, src1.type),
+ src1));
src1.reg_offset++;
inst->saturate = c->key.clamp_fragment_color;
}
@@ -2159,9 +2154,8 @@ fs_visitor::emit_fb_writes()
fs_reg color = outputs[0];
color.reg_offset += 3;
- inst = emit(BRW_OPCODE_MOV,
- fs_reg(MRF, write_color_mrf, color.type),
- color);
+ inst = emit(MOV(fs_reg(MRF, write_color_mrf, color.type),
+ color));
inst->saturate = c->key.clamp_fragment_color;
write_color_mrf = color_mrf + reg_width;
}
@@ -2206,7 +2200,7 @@ fs_visitor::resolve_ud_negate(fs_reg *reg)
return;
fs_reg temp = fs_reg(this, glsl_type::uint_type);
- emit(BRW_OPCODE_MOV, temp, *reg);
+ emit(MOV(temp, *reg));
*reg = temp;
}
@@ -2217,7 +2211,7 @@ fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg)
return;
fs_reg temp = fs_reg(this, glsl_type::bool_type);
- emit(BRW_OPCODE_AND, temp, *reg, fs_reg(1));
+ emit(AND(temp, *reg, fs_reg(1)));
*reg = temp;
}
--
1.7.10.4
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