[Mesa-dev] [PATCH 22/22] intel: Enable ETC2 support on intel hardware

[Eric Anholt]

Anuj Phogat <anuj.phogat at gmail.com> writes:

> Formats supported are:
> GL_COMPRESSED_RGB8_ETC2
> GL_COMPRESSED_SRGB8_ETC2
> GL_COMPRESSED_RGBA8_ETC2_EAC
> GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC
> GL_COMPRESSED_R11_EAC
> GL_COMPRESSED_RG11_EAC
> GL_COMPRESSED_SIGNED_R11_EAC
> GL_COMPRESSED_SIGNED_RG11_EAC
> GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2
> GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2

This commit message could be nicer.  Listing the mesa formats isn't
interesting, but explaining why the choice was made to support
uncompressed and which exact contexts will expose support for ETC2 would
be useful.  (If I'm reading this right, no context exposes etc2 support
as of this commit)

> +   switch(format) {

missing space

> +   case MESA_FORMAT_ETC1_RGB8:
>        wraps_etc1 = true;
> +      format = MESA_FORMAT_RGBX8888_REV;
> +      break;
> +   case MESA_FORMAT_ETC2_RGB8:
> +      etc2_format = format;
> +      wraps_etc2 = true;
> +      format = MESA_FORMAT_RGBX8888_REV;
> +      break;
> +   case MESA_FORMAT_ETC2_SRGB8:
> +   case MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC:
> +   case MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1:
> +      etc2_format = format;
> +      wraps_etc2 = true;
> +      format = MESA_FORMAT_SARGB8;
> +      break;
> +   case MESA_FORMAT_ETC2_RGBA8_EAC:
> +   case MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1:
> +      etc2_format = format;
> +      wraps_etc2 = true;
> +      format = MESA_FORMAT_RGBA8888_REV;
> +      break;
> +   case MESA_FORMAT_ETC2_R11_EAC:
> +   case MESA_FORMAT_ETC2_SIGNED_R11_EAC:
> +      etc2_format = format;
> +      wraps_etc2 = true;
> +      format = MESA_FORMAT_R16;
> +      break;
> +   case MESA_FORMAT_ETC2_RG11_EAC:
> +   case MESA_FORMAT_ETC2_SIGNED_RG11_EAC:
> +      etc2_format = format;
> +      wraps_etc2 = true;
> +      format = MESA_FORMAT_RG1616;
> +      break;
> +   default:
> +      /* Non ETC1 / ETC2 format */
> +      break;

>  static void
> +intel_miptree_map_etc2(struct intel_context *intel,
> +                       struct intel_mipmap_tree *mt,
> +                       struct intel_miptree_map *map,
> +                       unsigned int level,
> +                       unsigned int slice)
> +{
> +   /* For justification of these invariants,
> +    * see intel_mipmap_tree:wraps_etc2.
> +    */
> +   assert(mt->wraps_etc2);
> +
> +   /* intel_miptree_map_etc2() can be called from glCompressedTexImage2D
> +    * and CompressedTexSubImage2D. Hence the assertions below hold.
> +    */
> +   assert(map->mode & GL_MAP_WRITE_BIT);
> +   assert(map->mode & GL_MAP_INVALIDATE_RANGE_BIT);

It seems like the paths for wraps_etc1 and wraps_etc2 in the case
statement above and here in the map function are basically identical
except for _mesa_etc1_unpack vs _mesa_etc2_unpack.  Maybe merge those
two flags and just test at unmap to decide which to call?
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