[Mesa-dev] [PATCH V2 13/13] intel: Enable ETC2 support on intel hardware

[Eric Anholt]

Anuj Phogat <anuj.phogat at gmail.com> writes:

> This patch enables support for ETC2 compressed textures on
> all intel hardware. At present, ETC2 texture decoding is not
> available on intel hardware. So, compressed ETC2 texture data
> is decoded in software and stored in a suitable uncompressed
> MESA_FORMAT at the time of glCompressedTexImage2D. Currently,
> ETC2 formats are only exposed in OpenGL ES 3.0.
>
> V2: Use single flag (wraps_etc) for etc1 and etc2 formats.
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
> Missed these changes in my updated series last night.
>  static void
> +intel_miptree_map_etc2(struct intel_context *intel,
> +                       struct intel_mipmap_tree *mt,
> +                       struct intel_miptree_map *map,
> +                       unsigned int level,
> +                       unsigned int slice)
> +{
> +   /* For justification of these invariants,
> +    * see intel_mipmap_tree:wraps_etc.
> +    */
> +   assert(mt->wraps_etc);
> +
> +   /* intel_miptree_map_etc2() can be called from glCompressedTexImage2D
> +    * and CompressedTexSubImage2D. Hence the assertions below hold.
> +    */
> +   assert(map->mode & GL_MAP_WRITE_BIT);
> +   assert(map->mode & GL_MAP_INVALIDATE_RANGE_BIT);
> +
> +   map->stride = _mesa_format_row_stride(mt->etc_format, map->w);
> +   map->buffer = malloc(_mesa_format_image_size(mt->etc_format,
> +                        map->w, map->h, 1));
> +   map->ptr = map->buffer;
> +}
> +
> +static void
> +intel_miptree_unmap_etc2(struct intel_context *intel,
> +                         struct intel_mipmap_tree *mt,
> +                         struct intel_miptree_map *map,
> +                         unsigned int level,
> +                         unsigned int slice)
> +{
> +   uint32_t image_x;
> +   uint32_t image_y;
> +   intel_miptree_get_image_offset(mt, level, 0, slice, &image_x, &image_y);
> +
> +   uint8_t *dst = intel_region_map(intel, mt->region, map->mode)
> +                + image_y * mt->region->pitch * mt->region->cpp
> +                + image_x * mt->region->cpp;
> +
> +   _mesa_unpack_etc2_format(dst, mt->region->pitch * mt->region->cpp,
> +                            map->ptr, map->stride,
> +                            map->w, map->h, mt->etc_format);
> +
> +   intel_region_unmap(intel, mt->region);
> +   free(map->buffer);
> +}
> +
> +static void
>  intel_miptree_map_etc1(struct intel_context *intel,
>                         struct intel_mipmap_tree *mt,
>                         struct intel_miptree_map *map,
> @@ -1274,9 +1348,10 @@ intel_miptree_map_etc1(struct intel_context *intel,
>                         unsigned int slice)
>  {
>     /* For justification of these invariants,
> -    * see intel_mipmap_tree:wraps_etc1.
> +    * see intel_mipmap_tree:wraps_etc.
>      */
> -   assert(mt->wraps_etc1);
> +   assert(mt->wraps_etc);
> +   assert(mt->etc_format == MESA_FORMAT_ETC1_RGB8);
>     assert(mt->format == MESA_FORMAT_RGBX8888_REV);
>  
>     /* From the GL_OES_compressed_ETC1_RGB8_texture spec:
> @@ -1292,8 +1367,8 @@ intel_miptree_map_etc1(struct intel_context *intel,
>     assert(map->x == 0);
>     assert(map->y == 0);
>  
> -   map->stride = _mesa_format_row_stride(MESA_FORMAT_ETC1_RGB8, map->w);
> -   map->buffer = malloc(_mesa_format_image_size(MESA_FORMAT_ETC1_RGB8,
> +   map->stride = _mesa_format_row_stride(mt->etc_format, map->w);
> +   map->buffer = malloc(_mesa_format_image_size(mt->etc_format,
>                                                  map->w, map->h, 1));
>     map->ptr = map->buffer;
>  }

Why have a separate map_etc1 and map_etc2 if they're exactly the same
except that etc1 asserts that an etc1 format is in use and etc2 doesn't?

Similarly, the unmap paths are the same except for the decompression
function called.
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