[Mesa-dev] [PATCH V3 6/7] i965: emit w/a for packed attribute formats in VS
Paul Berry
stereotype441 at gmail.com
Mon Nov 26 10:58:14 PST 2012
On 26 November 2012 10:48, Ian Romanick <idr at freedesktop.org> wrote:
> On 11/21/2012 07:23 PM, Chris Forbes wrote:
>
>> Implements BGRA swizzle, sign recovery, and normalization
>> as required by ARB_vertex_type_10_10_10_2_**rev.
>>
>> V2: Ported to the new VS backend, since that's all that's left;
>> fixed normalization.
>>
>> V3: Moved fixups out of the GLSL-only path, so it works for FF/VP too.
>>
>> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
>> ---
>> src/mesa/drivers/dri/i965/brw_**vec4.h | 1 +
>> src/mesa/drivers/dri/i965/brw_**vec4_emit.cpp | 2 +
>> src/mesa/drivers/dri/i965/brw_**vec4_visitor.cpp | 124
>> ++++++++++++++++++++++---
>> 3 files changed, 114 insertions(+), 13 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/**brw_vec4.h
>> b/src/mesa/drivers/dri/i965/**brw_vec4.h
>> index ac1fb46..f0a2417 100644
>> --- a/src/mesa/drivers/dri/i965/**brw_vec4.h
>> +++ b/src/mesa/drivers/dri/i965/**brw_vec4.h
>> @@ -376,6 +376,7 @@ public:
>> void visit_instructions(const exec_list *list);
>>
>> void setup_vp_regs();
>> + void emit_attribute_fixups();
>> void emit_vertex_program_code();
>> void emit_vp_sop(uint32_t condmod, dst_reg dst,
>> src_reg src0, src_reg src1, src_reg one);
>> diff --git a/src/mesa/drivers/dri/i965/**brw_vec4_emit.cpp
>> b/src/mesa/drivers/dri/i965/**brw_vec4_emit.cpp
>> index a162420..dbfcd0f 100644
>> --- a/src/mesa/drivers/dri/i965/**brw_vec4_emit.cpp
>> +++ b/src/mesa/drivers/dri/i965/**brw_vec4_emit.cpp
>> @@ -776,6 +776,8 @@ vec4_visitor::generate_vs_**instruction(vec4_instruction
>> *instruction,
>> bool
>> vec4_visitor::run()
>> {
>> + emit_attribute_fixups();
>> +
>> /* Generate VS IR for main(). (the visitor only descends into
>> * functions called "main").
>> */
>> diff --git a/src/mesa/drivers/dri/i965/**brw_vec4_visitor.cpp
>> b/src/mesa/drivers/dri/i965/**brw_vec4_visitor.cpp
>> index a176e8a..f243699 100644
>> --- a/src/mesa/drivers/dri/i965/**brw_vec4_visitor.cpp
>> +++ b/src/mesa/drivers/dri/i965/**brw_vec4_visitor.cpp
>> @@ -799,6 +799,117 @@ vec4_visitor::emit_if_gen6(ir_**if *ir)
>> emit(IF(this->result, src_reg(0), BRW_CONDITIONAL_NZ));
>> }
>>
>> +static dst_reg
>> +with_writemask(dst_reg const & r, int mask)
>>
>
> Isn't that const in the wrong place? I'm super sharp about C++, but I
> thought most of the rules for references were the same as the rules for
> pointers.
Actually it's fine. The rule is that "const" comes after the thing it's
describing, except that if you put "const" at the beginning then the
compiler knows what you mean. So:
"char * const *foo" means "foo is a pointer to a constant pointer to a char"
"char const **foo" means "foo is a pointer to a pointer to a constant char"
"const char **foo" also means "foo is a pointer to a pointer to a constant
char"
I actually prefer Chris's style of putting the "const" after the type,
because it means I only have to remember one rule ("const comes after the
thing it describes"), but the grand tradition of code review has beaten me
into conformance with the status quo :)
>
>
> +{
>> + dst_reg result = r;
>> + result.writemask = mask;
>> + return result;
>> +}
>> +
>> +void
>> +vec4_visitor::emit_attribute_**fixups()
>> +{
>> + dst_reg * sign_recovery_shift = NULL;
>> + dst_reg * normalize_factor = NULL;
>> + dst_reg * es3_normalize_factor = NULL;
>> +
>> + for (int i = 0; i < VERT_ATTRIB_MAX; i++) {
>> + if (prog_data->inputs_read & BITFIELD64_BIT(i)) {
>> + uint8_t wa_flags = c->key.gl_attrib_wa_flags[i];
>> + dst_reg * reg = new (mem_ctx) dst_reg(ATTR, i);
>> + dst_reg reg_d = *reg;
>> + reg_d.type = BRW_REGISTER_TYPE_D;
>> + dst_reg reg_ud = *reg;
>> + reg_ud.type = BRW_REGISTER_TYPE_UD;
>> +
>> + /* Do GL_FIXED rescaling for GLES2.0. Our GL_FIXED attributes
>> + * come in as floating point conversions of the integer values.
>> + */
>> + if (wa_flags & BRW_ATTRIB_WA_COMPONENT_MASK) {
>> + dst_reg dst = *reg;
>> + dst.type = brw_type_for_base_type(glsl_**type::vec4_type);
>> + dst.writemask = (1 << (wa_flags &
>> BRW_ATTRIB_WA_COMPONENT_MASK)) - 1;
>> + emit(MUL(dst, src_reg(dst), src_reg(1.0f / 65536.0f)));
>> + }
>> +
>> + /* Do sign recovery for 2101010 formats if required. */
>> + if (wa_flags & BRW_ATTRIB_WA_SIGN) {
>> + if (!sign_recovery_shift) {
>> + // shift constant: <22,22,22,30>
>> + sign_recovery_shift = new (mem_ctx) dst_reg(this,
>> glsl_type::uvec4_type);
>> + emit(MOV(with_writemask(*sign_**recovery_shift,
>> WRITEMASK_XYZ), src_reg(22u)));
>> + emit(MOV(with_writemask(*sign_**recovery_shift,
>> WRITEMASK_W), src_reg(30u)));
>> + }
>> +
>> + emit(SHL(reg_ud, src_reg(reg_ud),
>> src_reg(*sign_recovery_shift))**);
>> + emit(ASR(reg_d, src_reg(reg_d),
>> src_reg(*sign_recovery_shift))**);
>> + }
>> +
>> + /* Apply BGRA swizzle if required. */
>> + if (wa_flags & BRW_ATTRIB_WA_BGRA) {
>> + src_reg temp = src_reg(*reg);
>> + temp.swizzle = BRW_SWIZZLE4(2,1,0,3);
>> + emit(MOV(*reg, temp));
>> + }
>> +
>> + if (wa_flags & BRW_ATTRIB_WA_NORMALIZE_ES3) {
>> + // 2.3 signed normalization for ES3
>> + // f = c / (2^(b-1)-1)
>> + if (!es3_normalize_factor) {
>> + // mul constant: 1 / (2^(b-1) - 1)
>> + es3_normalize_factor = new (mem_ctx) dst_reg(this,
>> glsl_type::vec4_type);
>> + emit(MOV(with_writemask(*es3_**normalize_factor,
>> WRITEMASK_XYZ),
>> + src_reg(1.0f / ((1<<9) - 1))));
>> + emit(MOV(with_writemask(*es3_**normalize_factor,
>> WRITEMASK_W),
>> + src_reg(1.0f / ((1<<1) - 1))));
>> + }
>> +
>> + dst_reg dst = *reg;
>> + dst.type = brw_type_for_base_type(glsl_**type::vec4_type);
>> + emit(MOV(dst, src_reg(reg_d)));
>> + emit(MUL(dst, src_reg(dst), src_reg(*es3_normalize_factor)**
>> ));
>> + emit_minmax(BRW_CONDITIONAL_G, dst, src_reg(dst),
>> src_reg(-1.0f));
>> + }
>> +
>> + if (wa_flags & BRW_ATTRIB_WA_NORMALIZE) {
>> + // 2.1 unsigned normalization
>> + // f = c/(2^n-1)
>> +
>> + // 2.2 signed normalization
>> + // f = (2c+1)/(2^n-1)
>> +
>> + if (!normalize_factor) {
>> + // 1 / (2^b - 1) for b=<10,10,10,2>
>> + normalize_factor = new (mem_ctx) dst_reg(this,
>> glsl_type::vec4_type);
>> + emit(MOV(with_writemask(***normalize_factor,
>> WRITEMASK_XYZ),
>> + src_reg(1.0f / ((1<<10) - 1))));
>> + emit(MOV(with_writemask(***normalize_factor,
>> WRITEMASK_W),
>> + src_reg(1.0f / ((1<<2) - 1))));
>> + }
>> +
>> + dst_reg dst = *reg;
>> + dst.type = brw_type_for_base_type(glsl_**type::vec4_type);
>> + emit(MOV(dst, src_reg((wa_flags & BRW_ATTRIB_WA_SIGN) ?
>> reg_d : reg_ud)));
>> +
>> + if (wa_flags & BRW_ATTRIB_WA_SIGN) {
>> + //emit(MAD(dst, src_reg(dst), src_reg(2.0f),
>> src_reg(1.0f)));
>> + emit(MUL(dst, src_reg(dst), src_reg(2.0f)));
>> + emit(ADD(dst, src_reg(dst), src_reg(1.0f)));
>> + }
>> +
>> + emit(MUL(dst, src_reg(dst), src_reg(*normalize_factor)));
>> + }
>> +
>> + if (wa_flags & BRW_ATTRIB_WA_SCALE) {
>> + dst_reg dst = *reg;
>> + dst.type = brw_type_for_base_type(glsl_**type::vec4_type);
>> + emit(MOV(dst, src_reg((wa_flags & BRW_ATTRIB_WA_SIGN) ?
>> reg_d : reg_ud)));
>> + }
>> + }
>> + }
>> +}
>> +
>> void
>> vec4_visitor::visit(ir_**variable *ir)
>> {
>> @@ -810,19 +921,6 @@ vec4_visitor::visit(ir_**variable *ir)
>> switch (ir->mode) {
>> case ir_var_in:
>> reg = new(mem_ctx) dst_reg(ATTR, ir->location);
>> -
>> - /* Do GL_FIXED rescaling for GLES2.0. Our GL_FIXED attributes
>> - * come in as floating point conversions of the integer values.
>> - */
>> - for (int i = ir->location; i < ir->location + type_size(ir->type);
>> i++) {
>> - uint8_t wa_flags = c->key.gl_attrib_wa_flags[i];
>> - if (wa_flags & BRW_ATTRIB_WA_COMPONENT_MASK) {
>> - dst_reg dst = *reg;
>> - dst.type = brw_type_for_base_type(ir->**type);
>> - dst.writemask = (1 << (wa_flags &
>> BRW_ATTRIB_WA_COMPONENT_MASK)) - 1;
>> - emit(MUL(dst, src_reg(dst), src_reg(1.0f / 65536.0f)));
>> - }
>> - }
>> break;
>>
>> case ir_var_out:
>>
>>
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