[Mesa-dev] [PATCH] radeon/llvm: do not use magic number for resourceId

Tom Stellard tom at stellard.net
Thu Nov 29 08:08:47 PST 2012


On Tue, Nov 27, 2012 at 11:06:42PM +0100, Vincent Lejeune wrote:
> ---
>  lib/Target/AMDGPU/AMDGPUIntrinsics.td              | 16 ++++----
>  .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp      | 43 +++++++++++-----------
>  lib/Target/AMDGPU/R600ISelLowering.cpp             | 17 +++++++--
>  lib/Target/AMDGPU/R600Instructions.td              | 42 ++++++++++-----------
>  4 files changed, 64 insertions(+), 54 deletions(-)
>

I've applied this, but I had to drop two chunks that wouldn't apply and
also didn't seem related to this patch.
 
> diff --git a/lib/Target/AMDGPU/R600ISelLowering.cpp b/lib/Target/AMDGPU/R600ISelLowering.cpp
> index 3adc5d6..a5dc1b4 100644
> --- a/lib/Target/AMDGPU/R600ISelLowering.cpp
> +++ b/lib/Target/AMDGPU/R600ISelLowering.cpp
> @@ -113,6 +113,9 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
>    setOperationAction(ISD::STORE, MVT::v4f32, Custom);
>    setOperationAction(ISD::STORE, MVT::v4i32, Custom);
>  
> +  setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Expand);
> +  setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Expand);
> +
>    setOperationAction(ISD::FrameIndex, MVT::i32, Custom);
>  
>    setTargetDAGCombine(ISD::FP_ROUND);

I dropped this chunk.

>  let hasSideEffects = 1 in {
> -  def MOVA_INT_eg : R600_1OP <0xCC, "MOVA_INT", []>;
> +  def MOVA_INT_eg : R600_1OP <0x18, "MOVA_INT", []>;
>  }
>  
>    def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>;

I dropped this chunk.



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