[Mesa-dev] [PATCH] AMDGPU: Remove unused macros v2
Tom Stellard
tom at stellard.net
Thu Nov 29 13:27:57 PST 2012
From: Tom Stellard <thomas.stellard at amd.com>
v2:
- Fix alignment of case statements
---
lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 4 +-
lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 37 +++++++--------
lib/Target/AMDGPU/AMDILISelDAGToDAG.cpp | 1 -
lib/Target/AMDGPU/AMDILISelLowering.cpp | 1 -
lib/Target/AMDGPU/AMDILUtilityFunctions.h | 75 ------------------------------
lib/Target/AMDGPU/R600InstrInfo.cpp | 1 -
6 files changed, 19 insertions(+), 100 deletions(-)
delete mode 100644 lib/Target/AMDGPU/AMDILUtilityFunctions.h
diff --git a/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp b/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
index 22b0794..d9defcb 100644
--- a/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
+++ b/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
@@ -16,7 +16,6 @@
#include "AMDGPURegisterInfo.h"
#include "AMDGPUTargetMachine.h"
#include "AMDIL.h"
-#include "AMDILUtilityFunctions.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -88,7 +87,8 @@ bool AMDGPUInstrInfo::getNextBranchInstr(MachineBasicBlock::iterator &iter,
switch (iter->getOpcode()) {
default:
break;
- ExpandCaseToAllScalarTypes(AMDGPU::BRANCH_COND);
+ case AMDGPU::BRANCH_COND_i32:
+ case AMDGPU::BRANCH_COND_f32:
case AMDGPU::BRANCH:
return true;
};
diff --git a/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp b/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
index de4cc0d..994ad22 100644
--- a/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
+++ b/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
@@ -12,7 +12,6 @@
#include "AMDGPUInstrInfo.h"
#include "AMDIL.h"
-#include "AMDILUtilityFunctions.h"
#include "llvm/ADT/SCCIterator.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
@@ -29,7 +28,6 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
-#define FirstNonDebugInstr(A) A->begin()
using namespace llvm;
// TODO: move-begin.
@@ -1407,7 +1405,7 @@ void CFGStructurizer<PassT>::mergeSerialBlock(BlockT *dstBlk, BlockT *srcBlk) {
<< " <= BB" << srcBlk->getNumber() << "\n";
}
//removeUnconditionalBranch(dstBlk);
- dstBlk->splice(dstBlk->end(), srcBlk, FirstNonDebugInstr(srcBlk), srcBlk->end());
+ dstBlk->splice(dstBlk->end(), srcBlk, srcBlk->begin(), srcBlk->end());
dstBlk->removeSuccessor(srcBlk);
CFGTraits::cloneSuccessorList(dstBlk, srcBlk);
@@ -1462,7 +1460,7 @@ void CFGStructurizer<PassT>::mergeIfthenelseBlock(InstrT *branchInstr,
branchDL);
if (trueBlk) {
- curBlk->splice(branchInstrPos, trueBlk, FirstNonDebugInstr(trueBlk), trueBlk->end());
+ curBlk->splice(branchInstrPos, trueBlk, trueBlk->begin(), trueBlk->end());
curBlk->removeSuccessor(trueBlk);
if (landBlk && trueBlk->succ_size()!=0) {
trueBlk->removeSuccessor(landBlk);
@@ -1472,7 +1470,7 @@ void CFGStructurizer<PassT>::mergeIfthenelseBlock(InstrT *branchInstr,
CFGTraits::insertInstrBefore(branchInstrPos, AMDGPU::ELSE, passRep);
if (falseBlk) {
- curBlk->splice(branchInstrPos, falseBlk, FirstNonDebugInstr(falseBlk),
+ curBlk->splice(branchInstrPos, falseBlk, falseBlk->begin(),
falseBlk->end());
curBlk->removeSuccessor(falseBlk);
if (landBlk && falseBlk->succ_size() != 0) {
@@ -2682,8 +2680,9 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> {
static int getBranchNzeroOpcode(int oldOpcode) {
switch(oldOpcode) {
case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET;
- ExpandCaseToAllScalarReturn(AMDGPU::BRANCH_COND, AMDGPU::IF_LOGICALNZ);
- case AMDGPU::SI_IF_NZ: return AMDGPU::SI_IF_NZ;
+ case AMDGPU::BRANCH_COND_i32:
+ case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALNZ_f32;
+ case AMDGPU::SI_IF_NZ: return AMDGPU::SI_IF_NZ;
default:
assert(0 && "internal error");
};
@@ -2693,8 +2692,9 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> {
static int getBranchZeroOpcode(int oldOpcode) {
switch(oldOpcode) {
case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET;
- ExpandCaseToAllScalarReturn(AMDGPU::BRANCH_COND, AMDGPU::IF_LOGICALZ);
- case AMDGPU::SI_IF_Z: return AMDGPU::SI_IF_Z;
+ case AMDGPU::BRANCH_COND_i32:
+ case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALZ_f32;
+ case AMDGPU::SI_IF_Z: return AMDGPU::SI_IF_Z;
default:
assert(0 && "internal error");
};
@@ -2704,26 +2704,22 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> {
static int getContinueNzeroOpcode(int oldOpcode)
{
switch(oldOpcode) {
- case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALNZ_i32;
- default:
- assert(0 && "internal error");
+ case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALNZ_i32;
+ default:
+ assert(0 && "internal error");
};
return -1;
}
static int getContinueZeroOpcode(int oldOpcode) {
switch(oldOpcode) {
- case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALZ_i32;
+ case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALZ_i32;
default:
assert(0 && "internal error");
};
return -1;
}
-// the explicitly represented branch target is the true branch target
-#define getExplicitBranch getTrueBranch
-#define setExplicitBranch setTrueBranch
-
static MachineBasicBlock *getTrueBranch(MachineInstr *instr) {
return instr->getOperand(0).getMBB();
}
@@ -2747,7 +2743,8 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> {
switch (instr->getOpcode()) {
case AMDGPU::JUMP:
return instr->getOperand(instr->findFirstPredOperandIdx()).getReg() != 0;
- ExpandCaseToAllScalarTypes(AMDGPU::BRANCH_COND);
+ case AMDGPU::BRANCH_COND_i32:
+ case AMDGPU::BRANCH_COND_f32:
case AMDGPU::SI_IF_NZ:
case AMDGPU::SI_IF_Z:
break;
@@ -3064,8 +3061,8 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> {
MachineBasicBlock *newBlk) {
MachineInstr *branchInstr = getLoopendBlockBranchInstr(srcBlk);
if (branchInstr && isCondBranch(branchInstr) &&
- getExplicitBranch(branchInstr) == oldBlk) {
- setExplicitBranch(branchInstr, newBlk);
+ getTrueBranch(branchInstr) == oldBlk) {
+ setTrueBranch(branchInstr, newBlk);
}
}
diff --git a/lib/Target/AMDGPU/AMDILISelDAGToDAG.cpp b/lib/Target/AMDGPU/AMDILISelDAGToDAG.cpp
index fd8bc2b..9477b52 100644
--- a/lib/Target/AMDGPU/AMDILISelDAGToDAG.cpp
+++ b/lib/Target/AMDGPU/AMDILISelDAGToDAG.cpp
@@ -14,7 +14,6 @@
#include "AMDGPUISelLowering.h" // For AMDGPUISD
#include "AMDGPURegisterInfo.h"
#include "AMDILDevices.h"
-#include "AMDILUtilityFunctions.h"
#include "llvm/ADT/ValueMap.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
diff --git a/lib/Target/AMDGPU/AMDILISelLowering.cpp b/lib/Target/AMDGPU/AMDILISelLowering.cpp
index 29e679c..23bd92a 100644
--- a/lib/Target/AMDGPU/AMDILISelLowering.cpp
+++ b/lib/Target/AMDGPU/AMDILISelLowering.cpp
@@ -16,7 +16,6 @@
#include "AMDILDevices.h"
#include "AMDILIntrinsicInfo.h"
#include "AMDGPUSubtarget.h"
-#include "AMDILUtilityFunctions.h"
#include "llvm/CallingConv.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
diff --git a/lib/Target/AMDGPU/AMDILUtilityFunctions.h b/lib/Target/AMDGPU/AMDILUtilityFunctions.h
deleted file mode 100644
index e6666f9..0000000
--- a/lib/Target/AMDGPU/AMDILUtilityFunctions.h
+++ /dev/null
@@ -1,75 +0,0 @@
-//===-- AMDILUtilityFunctions.h - AMDIL Utility Functions Header --------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//==-----------------------------------------------------------------------===//
-//
-// This file provides helper macros for expanding case statements.
-//
-//===----------------------------------------------------------------------===//
-#ifndef AMDILUTILITYFUNCTIONS_H_
-#define AMDILUTILITYFUNCTIONS_H_
-
-// Macros that are used to help with switch statements for various data types
-// However, these macro's do not return anything unlike the second set below.
-#define ExpandCaseTo32bitIntTypes(Instr) \
-case Instr##_i32:
-
-#define ExpandCaseTo32bitIntTruncTypes(Instr) \
-case Instr##_i32i8: \
-case Instr##_i32i16:
-
-#define ExpandCaseToIntTypes(Instr) \
- ExpandCaseTo32bitIntTypes(Instr)
-
-#define ExpandCaseToIntTruncTypes(Instr) \
- ExpandCaseTo32bitIntTruncTypes(Instr)
-
-#define ExpandCaseToFloatTypes(Instr) \
- case Instr##_f32:
-
-#define ExpandCaseTo32bitScalarTypes(Instr) \
- ExpandCaseTo32bitIntTypes(Instr) \
-case Instr##_f32:
-
-#define ExpandCaseToAllScalarTypes(Instr) \
- ExpandCaseToFloatTypes(Instr) \
-ExpandCaseToIntTypes(Instr)
-
-#define ExpandCaseToAllScalarTruncTypes(Instr) \
- ExpandCaseToFloatTruncTypes(Instr) \
-ExpandCaseToIntTruncTypes(Instr)
-
-#define ExpandCaseToAllTypes(Instr) \
-ExpandCaseToAllScalarTypes(Instr)
-
-#define ExpandCaseToAllTruncTypes(Instr) \
-ExpandCaseToAllScalarTruncTypes(Instr)
-
-// Macros that expand into statements with return values
-#define ExpandCaseTo32bitIntReturn(Instr, Return) \
-case Instr##_i32: return Return##_i32;
-
-#define ExpandCaseToIntReturn(Instr, Return) \
- ExpandCaseTo32bitIntReturn(Instr, Return)
-
-#define ExpandCaseToFloatReturn(Instr, Return) \
- case Instr##_f32: return Return##_f32;\
-
-#define ExpandCaseToAllScalarReturn(Instr, Return) \
- ExpandCaseToFloatReturn(Instr, Return) \
-ExpandCaseToIntReturn(Instr, Return)
-
-// These macros expand to common groupings of RegClass ID's
-#define ExpandCaseTo1CompRegID \
-case AMDGPU::GPRI32RegClassID: \
-case AMDGPU::GPRF32RegClassID:
-
-#define ExpandCaseTo32BitType(Instr) \
-case Instr##_i32: \
-case Instr##_f32:
-
-#endif // AMDILUTILITYFUNCTIONS_H_
diff --git a/lib/Target/AMDGPU/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp
index d9b9f2b..20b1aa3 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -17,7 +17,6 @@
#include "R600Defines.h"
#include "R600RegisterInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "AMDILUtilityFunctions.h"
#define GET_INSTRINFO_CTOR
#include "AMDGPUGenDFAPacketizer.inc"
--
1.7.11.4
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