[Mesa-dev] [PATCH 1/2] radeon/llvm: switch instructions matching fmul and int_AMDGPU_mul

Michel Dänzer michel at daenzer.net
Fri Nov 30 03:26:49 PST 2012


On Don, 2012-11-29 at 21:58 +0100, Vincent Lejeune wrote: 
> diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td
> index b0c1628..9259680 100644
> --- a/lib/Target/AMDGPU/R600Instructions.td
> +++ b/lib/Target/AMDGPU/R600Instructions.td
> @@ -553,8 +553,8 @@ let Predicates = [isR600toCayman] in {
>  
>  def ADD : R600_2OP_Helper <0x0, "ADD", fadd>;
>  // Non-IEEE MUL: 0 * anything = 0
> -def MUL : R600_2OP_Helper <0x1, "MUL NON-IEEE", int_AMDGPU_mul>;
> -def MUL_IEEE : R600_2OP_Helper <0x2, "MUL_IEEE", fmul>;
> +def MUL : R600_2OP_Helper <0x1, "MUL NON-IEEE", fmul>;
> +def MUL_IEEE : R600_2OP_Helper <0x2, "MUL_IEEE", int_AMDGPU_mul>;
>  def MAX : R600_2OP_Helper <0x3, "MAX", AMDGPUfmax>;
>  def MIN : R600_2OP_Helper <0x4, "MIN", AMDGPUfmin>;

Why are you swapping these? Doesn't fmul really require IEEE semantics,
whereas int_AMDGPU_mul does not?


-- 
Earthling Michel Dänzer           |                   http://www.amd.com
Libre software enthusiast         |          Debian, X and DRI developer


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