[Mesa-dev] [PATCH 5/6] i965: Add a flag for instructions with normal writemasking disabled.
Eric Anholt
eric at anholt.net
Fri Nov 30 13:24:19 PST 2012
For getting values from the new timestamp register, the channels we
load have nothing to do with the pixels dispatched.
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 1 +
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 1 +
4 files changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 86c33bc..dc85592 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -172,6 +172,7 @@ public:
bool shadow_compare;
bool force_uncompressed;
bool force_sechalf;
+ bool force_writemask_all;
uint32_t offset; /* spill/unspill offset */
/** @{
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 9a1f360..498b720 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -829,6 +829,7 @@ fs_generator::generate_code(exec_list *instructions)
brw_set_predicate_control(p, inst->predicate);
brw_set_predicate_inverse(p, inst->predicate_inverse);
brw_set_saturate(p, inst->saturate);
+ brw_set_mask_control(p, inst->force_writemask_all);
if (inst->force_uncompressed || dispatch_width == 8) {
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index d060941..8c6f56a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -171,6 +171,7 @@ public:
src_reg src[3];
bool saturate;
+ bool force_writemask_all;
int conditional_mod; /**< BRW_CONDITIONAL_* */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 5637b22..b8a1b59 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -721,6 +721,7 @@ vec4_generator::generate_code(exec_list *instructions)
brw_set_predicate_control(p, inst->predicate);
brw_set_predicate_inverse(p, inst->predicate_inverse);
brw_set_saturate(p, inst->saturate);
+ brw_set_mask_control(p, inst->force_writemask_all);
switch (inst->opcode) {
case BRW_OPCODE_MOV:
--
1.7.10.4
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