[Mesa-dev] [PATCH 2/2] i965: Implement the ARB_map_buffer_alignment extension.

[Kenneth Graunke]

(This extension became core in OpenGL 4.2.)

On Gen4+, all of our buffer objects are backed by GEM bos, which are
aligned to multiples of PAGE_SIZE (typically 4096, definitely >= 64).

Gen3 uses malloc'd memory for some buffers, so don't expose this
extension there.  It's not likely to be useful anyway.

We could actually set MIN_MAP_BUFFER_ALIGNMENT to getpagesize(), but
Daniel suggested being conservative and only advertising 64.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_context.c       | 2 ++
 src/mesa/drivers/dri/intel/intel_extensions.c | 1 +
 2 files changed, 3 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 1448965..1af29b2 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -168,6 +168,8 @@ brwCreateContext(int api,
    if (tnl)
       tnl->Driver.RunPipeline = _tnl_run_pipeline;
 
+   ctx->Const.MinMapBufferAlignment = 64;
+
    ctx->Const.MaxDualSourceDrawBuffers = 1;
    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index ec99c3e..71d3295 100755
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -135,6 +135,7 @@ intelInitExtensions(struct gl_context *ctx)
       ctx->Extensions.ARB_half_float_vertex = true;
       ctx->Extensions.ARB_occlusion_query = true;
       ctx->Extensions.ARB_occlusion_query2 = true;
+      ctx->Extensions.ARB_map_buffer_alignment = true;
       ctx->Extensions.ARB_point_sprite = true;
       ctx->Extensions.ARB_seamless_cube_map = true;
       ctx->Extensions.ARB_shader_bit_encoding = true;
-- 
1.8.0