[Mesa-dev] [PATCH 14/19] r600g: atomize clip state
Marek Olšák
maraeo at gmail.com
Mon Sep 10 16:16:27 PDT 2012
---
src/gallium/drivers/r600/evergreen_hw_context.c | 49 -----------------------
src/gallium/drivers/r600/evergreen_state.c | 42 +++----------------
src/gallium/drivers/r600/r600_hw_context.c | 25 +-----------
src/gallium/drivers/r600/r600_pipe.h | 10 +++--
src/gallium/drivers/r600/r600_state.c | 42 +++----------------
src/gallium/drivers/r600/r600_state_common.c | 18 +++++++++
6 files changed, 38 insertions(+), 148 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index 24c504d..7a3d088 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -73,31 +73,6 @@ static const struct r600_reg evergreen_context_reg_list[] = {
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
- {R_0285BC_PA_CL_UCP0_X, 0, 0},
- {R_0285C0_PA_CL_UCP0_Y, 0, 0},
- {R_0285C4_PA_CL_UCP0_Z, 0, 0},
- {R_0285C8_PA_CL_UCP0_W, 0, 0},
- {R_0285CC_PA_CL_UCP1_X, 0, 0},
- {R_0285D0_PA_CL_UCP1_Y, 0, 0},
- {R_0285D4_PA_CL_UCP1_Z, 0, 0},
- {R_0285D8_PA_CL_UCP1_W, 0, 0},
- {R_0285DC_PA_CL_UCP2_X, 0, 0},
- {R_0285E0_PA_CL_UCP2_Y, 0, 0},
- {R_0285E4_PA_CL_UCP2_Z, 0, 0},
- {R_0285E8_PA_CL_UCP2_W, 0, 0},
- {R_0285EC_PA_CL_UCP3_X, 0, 0},
- {R_0285F0_PA_CL_UCP3_Y, 0, 0},
- {R_0285F4_PA_CL_UCP3_Z, 0, 0},
- {R_0285F8_PA_CL_UCP3_W, 0, 0},
- {R_0285FC_PA_CL_UCP4_X, 0, 0},
- {R_028600_PA_CL_UCP4_Y, 0, 0},
- {R_028604_PA_CL_UCP4_Z, 0, 0},
- {R_028608_PA_CL_UCP4_W, 0, 0},
- {R_02860C_PA_CL_UCP5_X, 0, 0},
- {R_028610_PA_CL_UCP5_Y, 0, 0},
- {R_028614_PA_CL_UCP5_Z, 0, 0},
- {R_028618_PA_CL_UCP5_W, 0, 0},
- {GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_02861C_SPI_VS_OUT_ID_0, 0, 0},
{R_028620_SPI_VS_OUT_ID_1, 0, 0},
{R_028624_SPI_VS_OUT_ID_2, 0, 0},
@@ -392,30 +367,6 @@ static const struct r600_reg cayman_context_reg_list[] = {
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
- {R_0285BC_PA_CL_UCP0_X, 0, 0},
- {R_0285C0_PA_CL_UCP0_Y, 0, 0},
- {R_0285C4_PA_CL_UCP0_Z, 0, 0},
- {R_0285C8_PA_CL_UCP0_W, 0, 0},
- {R_0285CC_PA_CL_UCP1_X, 0, 0},
- {R_0285D0_PA_CL_UCP1_Y, 0, 0},
- {R_0285D4_PA_CL_UCP1_Z, 0, 0},
- {R_0285D8_PA_CL_UCP1_W, 0, 0},
- {R_0285DC_PA_CL_UCP2_X, 0, 0},
- {R_0285E0_PA_CL_UCP2_Y, 0, 0},
- {R_0285E4_PA_CL_UCP2_Z, 0, 0},
- {R_0285E8_PA_CL_UCP2_W, 0, 0},
- {R_0285EC_PA_CL_UCP3_X, 0, 0},
- {R_0285F0_PA_CL_UCP3_Y, 0, 0},
- {R_0285F4_PA_CL_UCP3_Z, 0, 0},
- {R_0285F8_PA_CL_UCP3_W, 0, 0},
- {R_0285FC_PA_CL_UCP4_X, 0, 0},
- {R_028600_PA_CL_UCP4_Y, 0, 0},
- {R_028604_PA_CL_UCP4_Z, 0, 0},
- {R_028608_PA_CL_UCP4_W, 0, 0},
- {R_02860C_PA_CL_UCP5_X, 0, 0},
- {R_028610_PA_CL_UCP5_Y, 0, 0},
- {R_028614_PA_CL_UCP5_Z, 0, 0},
- {R_028618_PA_CL_UCP5_W, 0, 0},
{R_02861C_SPI_VS_OUT_ID_0, 0, 0},
{R_028620_SPI_VS_OUT_ID_1, 0, 0},
{R_028624_SPI_VS_OUT_ID_2, 0, 0},
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index b54c2eb..902707c 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1122,43 +1122,13 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
return &view->base;
}
-static void evergreen_set_clip_state(struct pipe_context *ctx,
- const struct pipe_clip_state *state)
+static void evergreen_emit_clip_state(struct r600_context *rctx, struct r600_atom *atom)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
- struct pipe_constant_buffer cb;
-
- if (rstate == NULL)
- return;
-
- rctx->clip = *state;
- rstate->id = R600_PIPE_STATE_CLIP;
- for (int i = 0; i < 6; i++) {
- r600_pipe_state_add_reg(rstate,
- R_0285BC_PA_CL_UCP0_X + i * 16,
- fui(state->ucp[i][0]));
- r600_pipe_state_add_reg(rstate,
- R_0285C0_PA_CL_UCP0_Y + i * 16,
- fui(state->ucp[i][1]) );
- r600_pipe_state_add_reg(rstate,
- R_0285C4_PA_CL_UCP0_Z + i * 16,
- fui(state->ucp[i][2]));
- r600_pipe_state_add_reg(rstate,
- R_0285C8_PA_CL_UCP0_W + i * 16,
- fui(state->ucp[i][3]));
- }
-
- free(rctx->states[R600_PIPE_STATE_CLIP]);
- rctx->states[R600_PIPE_STATE_CLIP] = rstate;
- r600_context_pipe_state_set(rctx, rstate);
+ struct radeon_winsys_cs *cs = rctx->cs;
+ struct pipe_clip_state *state = &rctx->clip_state.state;
- cb.buffer = NULL;
- cb.user_buffer = state->ucp;
- cb.buffer_offset = 0;
- cb.buffer_size = 4*4*8;
- ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 1, &cb);
- pipe_resource_reference(&cb.buffer, NULL);
+ r600_write_context_reg_seq(cs, R_0285BC_PA_CL_UCP0_X, 6*4);
+ r600_write_array(cs, 6*4, (unsigned*)state);
}
static void evergreen_set_polygon_stipple(struct pipe_context *ctx,
@@ -2190,6 +2160,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6);
r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6);
r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, evergreen_emit_cb_misc_state, 0);
+ r600_init_atom(rctx, &rctx->clip_state.atom, id++, evergreen_emit_clip_state, 26);
r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, evergreen_emit_db_misc_state, 7);
r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4);
r600_init_atom(rctx, &rctx->viewport.atom, id++, r600_emit_viewport_state, 8);
@@ -2199,7 +2170,6 @@ void evergreen_init_state_functions(struct r600_context *rctx)
rctx->context.create_rasterizer_state = evergreen_create_rs_state;
rctx->context.create_sampler_state = evergreen_create_sampler_state;
rctx->context.create_sampler_view = evergreen_create_sampler_view;
- rctx->context.set_clip_state = evergreen_set_clip_state;
rctx->context.set_framebuffer_state = evergreen_set_framebuffer_state;
rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
rctx->context.set_scissor_state = evergreen_set_scissor_state;
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index fa6c867..7cf17d0 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -373,30 +373,6 @@ static const struct r600_reg r600_context_reg_list[] = {
{R_028E04_PA_SU_POLY_OFFSET_FRONT_OFFSET, 0, 0},
{R_028E08_PA_SU_POLY_OFFSET_BACK_SCALE, 0, 0},
{R_028E0C_PA_SU_POLY_OFFSET_BACK_OFFSET, 0, 0},
- {R_028E20_PA_CL_UCP0_X, 0, 0},
- {R_028E24_PA_CL_UCP0_Y, 0, 0},
- {R_028E28_PA_CL_UCP0_Z, 0, 0},
- {R_028E2C_PA_CL_UCP0_W, 0, 0},
- {R_028E30_PA_CL_UCP1_X, 0, 0},
- {R_028E34_PA_CL_UCP1_Y, 0, 0},
- {R_028E38_PA_CL_UCP1_Z, 0, 0},
- {R_028E3C_PA_CL_UCP1_W, 0, 0},
- {R_028E40_PA_CL_UCP2_X, 0, 0},
- {R_028E44_PA_CL_UCP2_Y, 0, 0},
- {R_028E48_PA_CL_UCP2_Z, 0, 0},
- {R_028E4C_PA_CL_UCP2_W, 0, 0},
- {R_028E50_PA_CL_UCP3_X, 0, 0},
- {R_028E54_PA_CL_UCP3_Y, 0, 0},
- {R_028E58_PA_CL_UCP3_Z, 0, 0},
- {R_028E5C_PA_CL_UCP3_W, 0, 0},
- {R_028E60_PA_CL_UCP4_X, 0, 0},
- {R_028E64_PA_CL_UCP4_Y, 0, 0},
- {R_028E68_PA_CL_UCP4_Z, 0, 0},
- {R_028E6C_PA_CL_UCP4_W, 0, 0},
- {R_028E70_PA_CL_UCP5_X, 0, 0},
- {R_028E74_PA_CL_UCP5_Y, 0, 0},
- {R_028E78_PA_CL_UCP5_Z, 0, 0},
- {R_028E7C_PA_CL_UCP5_W, 0, 0},
{R_028350_SX_MISC, 0, 0},
{R_028380_SQ_VTX_SEMANTIC_0, 0, 0},
{R_028384_SQ_VTX_SEMANTIC_1, 0, 0},
@@ -1038,6 +1014,7 @@ void r600_begin_new_cs(struct r600_context *ctx)
r600_atom_dirty(ctx, &ctx->alphatest_state.atom);
r600_atom_dirty(ctx, &ctx->blend_color.atom);
r600_atom_dirty(ctx, &ctx->cb_misc_state.atom);
+ r600_atom_dirty(ctx, &ctx->clip_state.atom);
r600_atom_dirty(ctx, &ctx->db_misc_state.atom);
r600_atom_dirty(ctx, &ctx->sample_mask.atom);
r600_atom_dirty(ctx, &ctx->stencil_ref.atom);
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 88db6d4..40ef474 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -35,7 +35,7 @@
#include "r600_resource.h"
#include "evergreen_compute.h"
-#define R600_NUM_ATOMS 23
+#define R600_NUM_ATOMS 24
#define R600_MAX_CONST_BUFFERS 2
#define R600_MAX_CONST_BUFFER_SIZE 4096
@@ -97,6 +97,11 @@ struct r600_blend_color {
struct pipe_blend_color state;
};
+struct r600_clip_state {
+ struct r600_atom atom;
+ struct pipe_clip_state state;
+};
+
struct r600_cs_shader_state {
struct r600_atom atom;
struct r600_pipe_compute *shader;
@@ -127,7 +132,6 @@ struct r600_viewport_state {
enum r600_pipe_state_id {
R600_PIPE_STATE_BLEND = 0,
- R600_PIPE_STATE_CLIP,
R600_PIPE_STATE_SCISSOR,
R600_PIPE_STATE_RASTERIZER,
R600_PIPE_STATE_VGT,
@@ -342,7 +346,6 @@ struct r600_context {
unsigned pa_sc_line_stipple;
unsigned pa_cl_clip_cntl;
/* for saving when using blitter */
- struct pipe_clip_state clip;
struct r600_pipe_shader_selector *ps_shader;
struct r600_pipe_shader_selector *vs_shader;
struct r600_pipe_rasterizer *rasterizer;
@@ -380,6 +383,7 @@ struct r600_context {
struct r600_alphatest_state alphatest_state;
struct r600_blend_color blend_color;
struct r600_cb_misc_state cb_misc_state;
+ struct r600_clip_state clip_state;
struct r600_db_misc_state db_misc_state;
struct r600_seamless_cube_map seamless_cube_map;
struct r600_stencil_ref_state stencil_ref;
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 3f25505..51dae91 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1120,43 +1120,13 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
return &view->base;
}
-static void r600_set_clip_state(struct pipe_context *ctx,
- const struct pipe_clip_state *state)
+static void r600_emit_clip_state(struct r600_context *rctx, struct r600_atom *atom)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
- struct pipe_constant_buffer cb;
-
- if (rstate == NULL)
- return;
-
- rctx->clip = *state;
- rstate->id = R600_PIPE_STATE_CLIP;
- for (int i = 0; i < 6; i++) {
- r600_pipe_state_add_reg(rstate,
- R_028E20_PA_CL_UCP0_X + i * 16,
- fui(state->ucp[i][0]));
- r600_pipe_state_add_reg(rstate,
- R_028E24_PA_CL_UCP0_Y + i * 16,
- fui(state->ucp[i][1]) );
- r600_pipe_state_add_reg(rstate,
- R_028E28_PA_CL_UCP0_Z + i * 16,
- fui(state->ucp[i][2]));
- r600_pipe_state_add_reg(rstate,
- R_028E2C_PA_CL_UCP0_W + i * 16,
- fui(state->ucp[i][3]));
- }
-
- free(rctx->states[R600_PIPE_STATE_CLIP]);
- rctx->states[R600_PIPE_STATE_CLIP] = rstate;
- r600_context_pipe_state_set(rctx, rstate);
+ struct radeon_winsys_cs *cs = rctx->cs;
+ struct pipe_clip_state *state = &rctx->clip_state.state;
- cb.buffer = NULL;
- cb.user_buffer = state->ucp;
- cb.buffer_offset = 0;
- cb.buffer_size = 4*4*8;
- ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 1, &cb);
- pipe_resource_reference(&cb.buffer, NULL);
+ r600_write_context_reg_seq(cs, R_028E20_PA_CL_UCP0_X, 6*4);
+ r600_write_array(cs, 6*4, (unsigned*)state);
}
static void r600_set_polygon_stipple(struct pipe_context *ctx,
@@ -2071,6 +2041,7 @@ void r600_init_state_functions(struct r600_context *rctx)
r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6);
r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6);
r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, r600_emit_cb_misc_state, 0);
+ r600_init_atom(rctx, &rctx->clip_state.atom, id++, r600_emit_clip_state, 26);
r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, r600_emit_db_misc_state, 4);
r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4);
r600_init_atom(rctx, &rctx->viewport.atom, id++, r600_emit_viewport_state, 8);
@@ -2080,7 +2051,6 @@ void r600_init_state_functions(struct r600_context *rctx)
rctx->context.create_rasterizer_state = r600_create_rs_state;
rctx->context.create_sampler_state = r600_create_sampler_state;
rctx->context.create_sampler_view = r600_create_sampler_view;
- rctx->context.set_clip_state = r600_set_clip_state;
rctx->context.set_framebuffer_state = r600_set_framebuffer_state;
rctx->context.set_polygon_stipple = r600_set_polygon_stipple;
rctx->context.set_scissor_state = r600_pipe_set_scissor_state;
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index a205ffd..77a5bbb 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -194,6 +194,23 @@ void r600_emit_blend_color(struct r600_context *rctx, struct r600_atom *atom)
r600_write_value(cs, fui(state->color[3])); /* R_028420_CB_BLEND_ALPHA */
}
+static void r600_set_clip_state(struct pipe_context *ctx,
+ const struct pipe_clip_state *state)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct pipe_constant_buffer cb;
+
+ rctx->clip_state.state = *state;
+ r600_atom_dirty(rctx, &rctx->clip_state.atom);
+
+ cb.buffer = NULL;
+ cb.user_buffer = state->ucp;
+ cb.buffer_offset = 0;
+ cb.buffer_size = 4*4*8;
+ ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 1, &cb);
+ pipe_resource_reference(&cb.buffer, NULL);
+}
+
static void r600_set_stencil_ref(struct pipe_context *ctx,
const struct r600_stencil_ref *state)
{
@@ -1516,6 +1533,7 @@ void r600_init_common_state_functions(struct r600_context *rctx)
rctx->context.delete_vertex_elements_state = r600_delete_vertex_elements;
rctx->context.delete_vs_state = r600_delete_vs_state;
rctx->context.set_blend_color = r600_set_blend_color;
+ rctx->context.set_clip_state = r600_set_clip_state;
rctx->context.set_constant_buffer = r600_set_constant_buffer;
rctx->context.set_sample_mask = r600_set_sample_mask;
rctx->context.set_stencil_ref = r600_set_pipe_stencil_ref;
--
1.7.9.5
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