[Mesa-dev] [PATCH 2/5] radeonsi: drop some cayman remnants
Christian König
deathsimple at vodafone.de
Sun Sep 30 06:06:42 PDT 2012
From: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Christian König <deathsimple at vodafone.de>
---
src/gallium/drivers/radeonsi/r600.h | 2 --
src/gallium/drivers/radeonsi/r600_hw_context.c | 7 +------
src/gallium/drivers/radeonsi/si_state.c | 13 +------------
src/gallium/drivers/radeonsi/si_state_streamout.c | 6 ++----
4 files changed, 4 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/r600.h b/src/gallium/drivers/radeonsi/r600.h
index c2c22c4..7a8ff10 100644
--- a/src/gallium/drivers/radeonsi/r600.h
+++ b/src/gallium/drivers/radeonsi/r600.h
@@ -39,7 +39,6 @@ struct winsys_handle;
enum radeon_family {
CHIP_UNKNOWN,
- CHIP_CAYMAN,
CHIP_TAHITI,
CHIP_PITCAIRN,
CHIP_VERDE,
@@ -47,7 +46,6 @@ enum radeon_family {
};
enum chip_class {
- CAYMAN,
TAHITI,
};
diff --git a/src/gallium/drivers/radeonsi/r600_hw_context.c b/src/gallium/drivers/radeonsi/r600_hw_context.c
index 685f195..6f816dc 100644
--- a/src/gallium/drivers/radeonsi/r600_hw_context.c
+++ b/src/gallium/drivers/radeonsi/r600_hw_context.c
@@ -45,12 +45,7 @@ void si_get_backend_mask(struct r600_context *ctx)
if (ctx->screen->info.r600_backend_map_valid) {
unsigned num_tile_pipes = ctx->screen->info.r600_num_tile_pipes;
unsigned backend_map = ctx->screen->info.r600_backend_map;
- unsigned item_width, item_mask;
-
- if (ctx->chip_class >= CAYMAN) {
- item_width = 4;
- item_mask = 0x7;
- }
+ unsigned item_width = 4, item_mask = 0x7;
while(num_tile_pipes--) {
i = backend_map & item_mask;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index b6b2306..b6e37fb 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1801,18 +1801,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
tl_y = 0;
br_x = state->width;
br_y = state->height;
-#if 0 /* These shouldn't be necessary on SI, see PA_SC_ENHANCE register */
- /* EG hw workaround */
- if (br_x == 0)
- tl_x = 1;
- if (br_y == 0)
- tl_y = 1;
- /* cayman hw workaround */
- if (rctx->chip_class == CAYMAN) {
- if (br_x == 1 && br_y == 1)
- br_x = 2;
- }
-#endif
+
tl = S_028240_TL_X(tl_x) | S_028240_TL_Y(tl_y);
br = S_028244_BR_X(br_x) | S_028244_BR_Y(br_y);
diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 3410eb6..2e17d90 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -56,10 +56,8 @@ void si_context_streamout_begin(struct r600_context *ctx)
util_bitcount(buffer_en & ~ctx->streamout_append_bitmask) * 6 +
ctx->num_cs_dw_streamout_end, TRUE);
- if (ctx->chip_class >= CAYMAN) {
- evergreen_flush_vgt_streamout(ctx);
- evergreen_set_streamout_enable(ctx, buffer_en);
- }
+ evergreen_flush_vgt_streamout(ctx);
+ evergreen_set_streamout_enable(ctx, buffer_en);
for (i = 0; i < ctx->num_so_targets; i++) {
#if 0
--
1.7.9.5
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