[Mesa-dev] [PATCH] i965/fs: Don't immediately schedule instructions that were just made available.

[Eric Anholt]

Matt Turner <mattst88 at gmail.com> writes:

> The original goal of pre-register allocation scheduling was to reduce
> live ranges so we'd use fewer registers and hopefully fit into 16-wide.
> In shader-db, this change causes us to lose 30 16-wide programs, but we
> gain 29... so it's a toss-up. At least by choosing instructions in a
> better order all programs should be slightly faster.

I think this will break the GLES3 test that we created this pass for.

I think we'll get the same performance benefit by round-robining our
allocated registers instead of packing them in the low numbers, which is
what that branch I had mentioned to you was for.
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