[Mesa-dev] [PATCH 1/3] intel: Add support for writing to our linear-temporary-CPU-map case.
Eric Anholt
eric at anholt.net
Tue Apr 2 18:46:31 PDT 2013
This will be used for handling updates of large textures.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 25 ++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 66cadeb..ffdaec5 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -1347,9 +1347,30 @@ intel_miptree_unmap_blit(struct intel_context *intel,
unsigned int level,
unsigned int slice)
{
- assert(!(map->mode & GL_MAP_WRITE_BIT));
-
+ struct gl_context *ctx = &intel->ctx;
drm_intel_bo_unmap(map->bo);
+
+ if (map->mode & GL_MAP_WRITE_BIT) {
+ unsigned int image_x, image_y;
+ int x = map->x;
+ int y = map->y;
+ intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y);
+ x += image_x;
+ y += image_y;
+
+ bool ok = intelEmitCopyBlit(intel,
+ mt->region->cpp,
+ map->stride, map->bo,
+ 0, I915_TILING_NONE,
+ mt->region->pitch, mt->region->bo,
+ mt->offset, mt->region->tiling,
+ 0, 0,
+ x, y,
+ map->w, map->h,
+ GL_COPY);
+ WARN_ONCE(!ok, "Failed to blit from linear temporary mapping");
+ }
+
drm_intel_bo_unreference(map->bo);
}
--
1.7.10.4
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