[Mesa-dev] [PATCH 2/2] i965/vs/gen7: Allow reads from MRFs.

[Matt Turner]

Since they're actually GRFs, we can read from them.

total instructions in shared programs: 344973 -> 342483 (-0.72%)
instructions in affected programs:     245602 -> 243112 (-1.01%)
(no regressions)
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp |   23 +++++++++++++----------
 1 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index c58fb44..e337738 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -927,16 +927,18 @@ vec4_visitor::opt_register_coalesce()
           * GRF we're trying to coalesce to, we don't actually handle
           * rewriting sources so bail in that case as well.
           */
-	 bool interfered = false;
-	 for (int i = 0; i < 3; i++) {
-	    if (scan_inst->src[i].file == GRF &&
-		scan_inst->src[i].reg == inst->src[0].reg &&
-		scan_inst->src[i].reg_offset == inst->src[0].reg_offset) {
-	       interfered = true;
-	    }
-	 }
-	 if (interfered)
-	    break;
+         if (intel->gen < 7) {
+            bool interfered = false;
+            for (int i = 0; i < 3; i++) {
+               if (scan_inst->src[i].file == GRF &&
+                   scan_inst->src[i].reg == inst->src[0].reg &&
+                   scan_inst->src[i].reg_offset == inst->src[0].reg_offset) {
+                  interfered = true;
+               }
+            }
+            if (interfered)
+               break;
+         }
 
          /* If somebody else writes our destination here, we can't coalesce
           * before that.
@@ -956,6 +958,7 @@ vec4_visitor::opt_register_coalesce()
                break;
             }
          } else {
+            bool interfered = false;
             for (int i = 0; i < 3; i++) {
                if (scan_inst->src[i].file == inst->dst.file &&
                    scan_inst->src[i].reg == inst->dst.reg &&
-- 
1.7.8.6