[Mesa-dev] [PATCH 3/3] i965: Prefer Y-tiling on Gen6+.

[Paul Berry]

On 8 April 2013 19:27, Kenneth Graunke <kenneth at whitecape.org> wrote:

> In the past, we preferred X-tiling for color buffers because our BLT
> code couldn't handle Y-tiling.  However, the BLT paths have been largely
> replaced by BLORP on Gen6+, which can handle any kind of tiling.
>
> We hadn't measured any performance improvement in the past, but that's
> probably because compressed textures were all uncompressed anyway.
>
> Improves performance in GLB27_TRex_C24Z16_FixedTime by 7.69231%.
>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
>

This patch regresses piglit test "spec/!OpenGL 1.2/tex3d-maxsize" for me
(on Gen7).


> ---
>  src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
> b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
> index 8dd04be..6a9f08c 100644
> --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
> @@ -344,7 +344,7 @@ intel_miptree_choose_tiling(struct intel_context
> *intel,
>        return I915_TILING_Y;
>
>     if (width0 >= 64)
> -      return I915_TILING_X;
> +      return intel->gen >= 6 ? I915_TILING_Y : I915_TILING_X;
>
>     return I915_TILING_NONE;
>  }
> --
> 1.8.1.1
>
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