[Mesa-dev] [PATCH 1/2] intel: Refactor code in intel_miptree_choose_tiling().

[Kenneth Graunke]

This reduces the nesting level slightly, and in my opinion, makes it a
bit easier to follow.

Cc: Paul Berry <stereotype441 at gmail.com>
Cc: Chad Versace <chad.versace at linux.intel.com>
Cc: Eric Anholt <eric at anholt.net>
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index df70cca..8fcdb46 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -342,15 +342,17 @@ intel_miptree_choose_tiling(struct intel_context *intel,
         base_format == GL_DEPTH_STENCIL_EXT))
       return I915_TILING_Y;
 
-   if (width0 >= 64) {
-      if (ALIGN(mt->total_width * mt->cpp, 512) < 32768)
-         return intel->gen >= 6 ? I915_TILING_Y : I915_TILING_X;
+   /* If the width is smaller than a tile, don't bother tiling. */
+   if (width0 < 64)
+      return I915_TILING_NONE;
 
+   if (ALIGN(mt->total_width * mt->cpp, 512) >= 32768) {
       perf_debug("%dx%d miptree too large to blit, falling back to untiled",
                  mt->total_width, mt->total_height);
+      return I915_TILING_NONE;
    }
 
-   return I915_TILING_NONE;
+   return intel->gen >= 6 ? I915_TILING_Y : I915_TILING_X;
 }
 
 struct intel_mipmap_tree *
-- 
1.8.2.1