[Mesa-dev] [PATCH 9.1] i965: Fix an inconsistency inb the VUE map with gl_ClipVertex on gen4/5.
Jordan Justen
jljusten at gmail.com
Mon Apr 15 09:27:23 PDT 2013
NAK. I got access to < gen6, and tested this patch. This backport is invalid.
On Wed, Apr 10, 2013 at 8:40 PM, Jordan Justen
<jordan.l.justen at intel.com> wrote:
> From: Eric Anholt <eric at anholt.net>
>
> We are intentionally not allocating a slot for gl_ClipVertex. But by
> leaving the bit set in the slots_valid, the fragment shader's computation
> of where varyings are in urb entry coming out of the SF would be off by
> one. Fixes rendering in Freespace 2 SCP, and improves rendering in TF2.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62830
> Tested-by: Joaquín Ignacio Aramendía <samsagax at gmail.com>
> NOTE: This is a candidate for the 9.1 branch.
> Reviewed-and-tested-by: Kenneth Graunke <kenneth at whitecape.org>
> Reviewed-by: Paul Berry <stereotype441 at gmail.com>
> [jordan.l.justen at intel.com: backport for 9.1 branch]
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> Cc: Eric Anholt <eric at anholt.net>
> Cc: Paul Berry <stereotype441 at gmail.com>
> ---
> Ken: Can you test this on 9.1 with Ironlake+TF2?
> Eric/Paul: Does this backport of 0967c362 to 9.1 seem right?
>
> src/mesa/drivers/dri/i965/brw_vs.c | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
> index 0810471..705309c 100644
> --- a/src/mesa/drivers/dri/i965/brw_vs.c
> +++ b/src/mesa/drivers/dri/i965/brw_vs.c
> @@ -65,6 +65,12 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
> GLbitfield64 outputs_written = c->prog_data.outputs_written;
> int i;
>
> + /* Prior to Gen6, don't assign a slot for VARYING_SLOT_CLIP_VERTEX, since
> + * it is unsupported.
> + */
> + if (intel->gen < 6)
> + outputs_written &= ~VERT_RESULT_CLIP_VERTEX;
> +
> vue_map->num_slots = 0;
> for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
> vue_map->vert_result_to_slot[i] = -1;
> @@ -143,15 +149,12 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
> * assign them contiguously. Don't reassign outputs that already have a
> * slot.
> *
> - * Also, prior to Gen6, don't assign a slot for VERT_RESULT_CLIP_VERTEX,
> - * since it is unsupported. In Gen6 and above, VERT_RESULT_CLIP_VERTEX may
> - * be needed for transform feedback; since we don't want to have to
> - * recompute the VUE map (and everything that depends on it) when transform
> - * feedback is enabled or disabled, just go ahead and assign a slot for it.
> + * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
> + * since it's encoded as the clip distances by emit_clip_distances().
> + * However, it may be output by transform feedback, and we'd rather not
> + * recompute state when TF changes, so we just always include it.
> */
> for (int i = 0; i < VERT_RESULT_MAX; ++i) {
> - if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
> - continue;
> if ((outputs_written & BITFIELD64_BIT(i)) &&
> vue_map->vert_result_to_slot[i] == -1) {
> assign_vue_slot(vue_map, i);
> --
> 1.7.10.4
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
More information about the mesa-dev
mailing list