[Mesa-dev] [PATCH v3] R600/SI: Add pattern for AMDGPUurecip
Christian König
deathsimple at vodafone.de
Sat Apr 20 02:35:59 PDT 2013
Am 20.04.2013 06:06, schrieb Tom Stellard:
> On Thu, Apr 11, 2013 at 10:12:01AM +0200, Christian König wrote:
>> Am 10.04.2013 18:50, schrieb Tom Stellard:
>>> On Wed, Apr 10, 2013 at 05:59:48PM +0200, Michel Dänzer wrote:
>>>> [SNIP]
>>> We should start using the updated pattern syntax for all new patterns.
>>> This means replacing register classes with types for the input patterns
>>> and omitting the type in the output pattern:
>>>
>>> def : Pat <
>>> (AMDGPUurecip i32:$src0),
>>> (V_CVT_U32_F32_e32
>>> (V_MUL_F32_e32 CONST.FP_UINT_MAX_PLUS_1,
>>> (V_RCP_IFLAG_F32_e32 (V_CVT_F32_U32_e32 $src0))))
>>>
>>> With that change:
>>>
>>> Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
>> BTW: I created the attached patches two weeks ago. They rework most
>> of the existing patterns on SI to use the new format, but I
>> currently don't have time to rebase, test & commit them. They
>> shouldn't change anything in functionality, so if you guys think
>> they are ok then please review and commit them.
>>
> Thanks for doing this. I've thrown these patches into a branch along
> with changes to the R600 patterns. I will try to test them next week.
> Is there any reason why we can't squash all these patches together before
> we commit?
No not really. I just usually split patches up for testing each
individually, so feel free to squash merge them for commit.
Christian.
More information about the mesa-dev
mailing list