[Mesa-dev] [PATCH] i965: Apply CMP NULL {Switch} work-around to other Gen7s.

[Matt Turner]

Listed in the restrictions section of CMP, but not on the work-arounds
page.
---
 src/mesa/drivers/dri/i965/brw_eu_emit.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 704f219..f379263 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1677,8 +1677,11 @@ void brw_CMP(struct brw_compile *p,
    /* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec workarounds
     * page says:
     *    "Any CMP instruction with a null destination must use a {switch}."
+    *
+    * It also applies to other Gen7 platforms (IVB, VLV) even though it isn't
+    * mentioned on their work-arounds pages.
     */
-   if (intel->is_haswell) {
+   if (intel->gen == 7) {
       if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE &&
           dest.nr == BRW_ARF_NULL) {
          insn->header.thread_control = BRW_THREAD_SWITCH;
-- 
1.7.8.6