[Mesa-dev] [PATCH 9.1 1/2] i965/vs: Fix Gen4/5 VUE map inconsistency with gl_ClipVertex

[Chris Forbes]

This is roughly a backport of Paul's commit 0967c362.

We avoided assigning a slot in the VUE map for gl_ClipVertex, but left
the bit set in outputs_written, producing horrible confusion further
down the pipe.

Mostly fixes rendering in source games, and probably in Freespace 2 SCP.

Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
---
 src/mesa/drivers/dri/i965/brw_vs.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 0810471..bd1ace2 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -62,9 +62,13 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
 {
    const struct intel_context *intel = &brw->intel;
    struct brw_vue_map *vue_map = &c->prog_data.vue_map;
-   GLbitfield64 outputs_written = c->prog_data.outputs_written;
+   GLbitfield64 outputs_written;
    int i;
 
+   if (intel->gen < 6)
+      c->prog_data.outputs_written &= ~VERT_RESULT_CLIP_VERTEX;
+   outputs_written = c->prog_data.outputs_written;
+
    vue_map->num_slots = 0;
    for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
       vue_map->vert_result_to_slot[i] = -1;
@@ -150,8 +154,6 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
     * feedback is enabled or disabled, just go ahead and assign a slot for it.
     */
    for (int i = 0; i < VERT_RESULT_MAX; ++i) {
-      if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
-         continue;
       if ((outputs_written & BITFIELD64_BIT(i)) &&
           vue_map->vert_result_to_slot[i] == -1) {
          assign_vue_slot(vue_map, i);
-- 
1.8.2.1